MPC755 and MPC745 PowerPC microprocessors are high-performance, low-power, 32-bit implementations of
the PowerPC Reduced Instruction Set Computer (RISC) architecture, specially enhanced for embedded applications.
MPC755 and MPC745 microprocessors differ only in that the MPC755 features an enhanced, dedicated L2 cache
interface with on-chip L2 tags. The MPC755 is a drop-in replacement for the award winning PowerPC 750
microprocessor and is footprint and user software code compatible with the MPC7400 microprocessor with AltiVec
technology. The MPC745 is a drop-in replacement for the PowerPC 740 microprocessor and is also footprint
and user software code compatible with the PowerPC 603e
microprocessor. MPC755/745 microprocessors provide on-chip
debug support and are fully JTAG-compliant.
Superscalar Microprocessor
MPC755 and MPC745 microprocessors are superscalar, capable
of issuing three instructions per clock cycle (two instructions
+ branch) into six independent execution units:
I
Two integer units
I
Load/store unit
I
Double-precision floating-point unit
I
System register unit
I
Branch processing unit
The ability to execute multiple instructions in parallel, to
pipeline instructions, and the use of simple instructions
with rapid execution times yields maximum efficiency and
throughput for MPC755 and MPC745 systems.
Power Management
The MPC755 and MPC745 microprocessors feature a
low-power 2.0-volt design with three power-saving user-
programmable modes — doze, nap and sleep — which
progressively reduce the power drawn by the processor.
These low-power microprocessors offer dynamic power
management to selectively activate functional units as they
are needed by the executing instructions. Both
microprocessors
also provide a thermal assist unit and
instruction cache throttling for software-controllable
thermal management.
32b/64b Data
32b Address
Bus Interface Unit
L2 Tags
System Bus
FSRAM
I
U
Floating
Point
Unit
I MMU
Inst. Cache
D MMU
Data Cache
Load/
Store
Unit
Dispatch
Unit
Completion
Unit
Branch
Unit
Gen
Reg
File
G
R
FPU
Reg
File
L2 Cache
Port (755 only)
MPC755FACT/D
REV. 0
F a c t S h e e t
M
OTOROLA
MPC755
AND
MPC745
P
OWER
PC
M
ICROPROCESSORS
Motorola MPC755
PowerPC Microprocessor
MPC755/745 Microprocessor
Block Diagram