MC68HC16Z1TUT/D
BCLRW
TFLG1 $4000
;clear TOC4 flag
RTI
OC1_INT:
;interrupt routine for OC1
LDAB
OC1D
BNE
DRIVE_PINS_LO
;branch if pins are high
BSETW
OC1M $0038
;set OC1-3 to go high at next match
BRA
GET_TOC1
DRIVE_PINS_LO:
BCLRW
OC1M $0038
;set OC1-3 to go low at next match
GET_TOC1:
LDD
TOC1
ADDD
#$100
STD
TOC1
;add #$100 to value in OC1 register
BCLRW
TFLG1 $0800
;clear TOC1 flag
RTI
INT:
RTI
;unused interrupts point here
4.6 Configuring the Analog-to-Digital Converter
The analog-to-digital converter (ADC) takes an analog voltage as an input, and provides a digital read-
ing. It has eight channels and selectable 8- or 10-bit resolution. Each result is available in three formats:
right-justified unsigned, left-justified signed, and left-justified unsigned, depending on the address from
which it is read. The ADC can also be used for digital I/O. Port ADA is an input-only port, and port ADB
is an output-only port. Data in these two ports resides in the port data register (called PDR in older man-
uals and PORTADA in newer manuals).
In order to use the ADC as an analog-to-digital converter, the user must be sure to properly connect the
following pins:
VRH and VRL: These are the analog reference voltages that are connected to the analog reference
pins. The ADC uses them as a reference to determine the range of voltage it can expect on the
analog input pins. Because they are separated from the analog power supply pins (VDDA and VSSA),
they can (and should) be connected to regulated and filtered supplies to allow the ADC to achieve
its highest degree of accuracy. Any noise on these two pins will translate into errors in the conver-
sion results. The use of bypass capacitors or low-pass filtering is recommended. In addition, VRH
must be less than or equal to VDDA, and VRL must be greater than or equal to VSSA.
VDDA and VSSA: These pins supply power to the analog circuitry associated with the sample am-
plifier and RC DAC array. Other circuitry in the ADC is powered from the digital power bus (pins
VDDI and VSSI). Dedicated power for the RC DAC array is necessary to isolate sensitive analog cir-
cuitry from noise on the digital power bus. The power to VDDA and VSSA should be as quiet as pos-
sible.
Analog input pins (AN[0:7]): These are the actual input pins to the converter. The input to these
pins must be within the range specified by VRH and VRL. The ADC converts the analog input on
these pins to digital data. These inputs should have low AC impedance at the pins. This can be ac-
complished by placing a capacitor with good high frequency characteristics at the input pin. A series
resistor can also be used to implement a simple RC filter. However, when using a series resistor,
the user must consider the source impedance of the circuit supply the analog signal and any leak-
age that may occur.
It is imperative that for greatest accuracy in conversions, the analog power supply and reference volt-
ages must be isolated from the digital power bus. There must be low impedance paths between all an-
alog ground points in the circuit. Use large-width PC board traces for routing power to decrease
impedance between analog reference points, increase the effectiveness of decoupling/filtering, and de-
crease the chance of high frequency cross-coupling. For best results, carve an analog ground plane out
of the digital ground plane. Chapter 6 of the
ADC Reference Manual (ADCRM/AD) has more information
on pin connection considerations.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.