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參數(shù)資料
| 型號： | MC68HC16Z1VEH16 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 3/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 16BIT 1K FLASH 132-PQFP |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 系列： | HC16 |
| 核心處理器： | CPU16 |
| 芯體尺寸： | 16-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，SCI，SPI |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 16 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 132-BQFP 緩沖式 |
| 包裝： | 托盤 |
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2.5.2.3 Layout and Strange Behavior
Oscillator layout is just as important as a good quality crystal and cleanliness in manufacturing the print-
ed circuit board. The best possible solution is to use a multi-layer board with a separate ground plane.
The rules for oscillator layout are quite simple. First, locate the crystal and all associated external com-
ponents as close to the oscillator pins as possible. Second, do not under any circumstance run a high-
frequency trace under either the feedback or series resistor or the crystal. Third, if there is no separate
ground plane, make sure that the ground for the bypass capacitors is connected to a solid ground trace.
Figure 5 shows typical one-layer oscillator layout.
Figure 5 Typical One-Layer Oscillator Layout
Do not run high frequency conductors near, and particularly underneath, the crystal, the feedback re-
sistor or the series resistor. In Figure 5, only a ground trace runs underneath these components. Also
note that, in Figure 5, the ground trace is tied to the ground pin nearest to the oscillator pins. This helps
prevent large loop currents in the vicinity of the crystal. It is also very important to tie the ground pin to
the most solid ground in the system. The trace that connects the oscillator and the ground plane should
not connect to any other circuit element as the injection of current into this trace tends to make the os-
cillator unstable.
2.5.2.4 XFC and VDDSYN
Noise on the XFC, VDDSYN, and VSSI pins causes frequency shifts in CLKOUT. The XFC filter capacitor
and the VDDSYN bypass capacitors should be kept as close to the XFC and VDDSYN pins as possible
with no digital logic coupling to either XFC or VDDSYN. The ground for the VDDSYN bypass capacitors
should be tied directly to the VSSI ground plane. If possible, route VDDSYN and VSSI as separate supply
runs or planes. VDDSYN may require an inductive or resistive filter to control supply noise.
A VDDSYN resistive filter would consist of a 100 to 500 resistor from VDD to VDDSYN and a 0.1-F by-
pass capacitor from VDDSYN to VSSI. The proper values for the resistor and capacitor can be determined
by examining the frequency of the VDDSYN noise. The RC time constant needs to be large enough to
filter the supply noise. An inductive filter would replace the resistor with an inductor.
The low-pass filter requires an external low-leakage capacitor, typically 0.1
F with an insulation resis-
tance specification as high as practical. The main criterion is that the capacitor be low-leakage because
leakage affects frequency stability and accuracy. Do not use a tantalum capacitor. Although the
SIM
Reference Manual (SIMRM/AD) recommends an insulation resistance of 30,000 M
, this value may not
be necessary in all applications. For most consumer (room temperature) applications, polystyrene ca-
pacitors are recommended. See Figure 6 for a recommended circuit.
332TUT XTAL PCB LAYOUT
XTAL
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Cbypass
GROUND
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EXTAL
GND
XTAL
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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