參數(shù)資料
型號: MC68HC16Z1VEH16
廠商: Freescale Semiconductor
文件頁數(shù): 26/56頁
文件大小: 0K
描述: IC MCU 16BIT 1K FLASH 132-PQFP
標準包裝: 36
系列: HC16
核心處理器: CPU16
芯體尺寸: 16-位
速度: 16MHz
連通性: EBI/EMI,SCI,SPI
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 8x10b
振蕩器型: 內部
工作溫度: -40°C ~ 105°C
封裝/外殼: 132-BQFP 緩沖式
包裝: 托盤
MC68HC16Z1TUT/D
with the transfer B to extension field instructions (TBEK, TBXK, TBYK, TBZK, and TBSK). An example
of how to modify an extension register is shown below:
INIT:
LDAB #$01
TBEK
;EK is now set to $1
ACCESS:
LDD $0000
;Load accumulator D with the value at address $10000
4.1.1.3 Switching Between Banks
One way to access a particular bank when doing extended addressing is to write that bank number into
the EK register. Then, every time the program reads or writes a memory location, bits 16 through 19 of
the extended address will be the value in the EK register. Many programmers use the EK register to
access bank 15, since that is where the internal registers are located. To access other banks, use one
or more of the index registers as page pointers. The IZ register is the most convenient register to use
because both it and the ZK field can be stored in the reset vector so that it is initialized automatically
out of reset.
Shown below is a short sample code snippet that uses index registers as page pointers. In this example,
the IY register points to bank 10, and the EK field points to bank 15. This code snippet initializes CS-
BOOT to point to bank 10. Note that the addresses written to the chip select base address registers
include bits [23:20]. This is because the address comparators that determine whether a chip select line
should assert compare bits [23:20] of the actual address bus to bits [23:20] of the address in the chip
select base address register. The chip select registers are discussed in further detail in 4.2.6 Chip-Se-
INITSYS:
LDAB
#$0F
TBEK
;set EK to $0F to access control registers
LDAB
#$0A
TBYK
;IY will address bank 10
CSINIT:
LDD
#$FA03
;CSBOOT block size=64 KBytes,assume 16-bit port
STD
CSBARBT
;base addr = $FA0000, bank A
MAIN:
LDD
#$1234
;Load D with the immediate value of #$1234
STD
$7300,Y
;Store #$1234 at $FA7300 (bank 10)
In summary, the memory map for CPU16-based processors consists of two 512 Kbyte blocks separated
by a gap from address $80000 to address $F7FFFF. This is because when CPU driven, address lines
[20:23] follow the same logic state as address line 19. Because these lines are driven automatically, the
CPU only “sees” the lower 20 bits of the address, and the upper 4 bits are transparent. Therefore, the
CPU can view the memory space as sixteen continuous 64 Kbyte banks without worrying about the gap
between banks 7 and 8 when accessing memory.
4.1.2 Exceptions
An exception is a special condition, such as a reset, an interrupt, or an address error, that pre-empts
normal processing. When the processor recognizes an exception, it jumps to a special address and ex-
ecutes code starting at that address until it reaches a return from interrupt (RTI) instruction. Then, it
resumes execution of the normal program code. The vectors in the exception vector table tell the pro-
cessor the starting address of each exception routine.
4.1.3 Exception Vector Table
The CPU16 recognizes 256 exception vector numbers. Each vector number corresponds to a space in
the exception vector table that is one word long. Thus, the table extends 512 bytes upward in memory
from the base address. Each of the spaces in the table contains a 16-bit value that is used as an ad-
dress pointer, or vector. The actual address of each of the vectors in the table, referred to as the vector
address, is two times the vector number and is located in memory bank 0.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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