
ule is disabled out of reset, the CSBOOT signal is generally used to select an external boot ROM. The
CSBOOT chip-select circuit features hardware-controlled selection of 8-bit or 16-bit bus width. Bus
width is controlled by the state of the DATA0 line at the release of the RESET signal. The default bus
width out of reset is 16 bits because the DATA0 line is pulled up to logic level 1 internally; however, the
For example, to design a system that uses 16-bit boot memory built from two 27C512 byte EPROMs,
connect the chip-select and output enable lines of the EPROMs to the CSBOOT line. Also connect MCU
address lines ADDR[1:16] to address lines [0:15] of the memories. Do not use ADDR0 of the MCU. This
system will be word accessible only.
In general, the MCU cannot make byte writes to word memory selected by CSBOOT. This lack of byte
write capability is not much of a practical limitation since the CSBOOT signal is generally used for read-
only access, and all CPU32 instructions must be word-aligned. However, if byte-write capability is re-
quired, the SIZ and CSBOOT signals can be used to generate “high byte” and “l(fā)ow byte” chip-select
signals. The only other way to modify individual bytes is to use word moves, being careful to write the
original data back to the unchanged byte.
2.9.3 Using Chip-Select Signals to Enable External Memory
Chip-select signals can be configured for 8-bit or 16-bit ports. To use an 8-bit memory, connect the
memory element’s data lines to the upper half of the MCU data bus (DATA[15:8]). The MCU reads and
writes an 8-bit port on the upper half of the data bus. During write cycles, data is echoed on the lower
half of the data bus as well. Connect address line ADDR0 of the MCU to A0 of the memory. An example
configuration is shown in Figure 12. To use a 16-bit memory, connect the memory data lines to MCU
data bus (DATA[15:0]). Connect address line ADDR1 from the MCU to A0 of the memory.
Figure 12 Using Chip-Select Signals to Enable 8-Bit RAM
2.9.3.1 How to Construct Word Memory from Two Byte Memories
For chip-select signals other than CSBOOT, forming word memory that is byte-accessible from two
332TUT EXT MEM CONN 1
MCU
ADDR[16:0]
DATA[15:0]
R/W
CS0
CSBOOT
ROM ENABLE
ADDR[16:1]
DATA
RAM
32K X 8
ROM
32K X 16
CE
ADDR[13:0]
R/W
DATA[15:8]
DATA[15:0]
ADDR
DATA
ADDR
CE
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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