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參數(shù)資料
| 型號： | MC68HC16Z1VEH16 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 13/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 16BIT 1K FLASH 132-PQFP |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 系列： | HC16 |
| 核心處理器： | CPU16 |
| 芯體尺寸： | 16-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，SCI，SPI |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 16 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 132-BQFP 緩沖式 |
| 包裝： | 托盤 |
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MC68HC16Z1TUT/D
the write cycle chip-select access time. The other known parameters are shown in Table 2.
MCU read cycle access time is used to determine the number of wait states needed for a given memory
speed, because it is longer than write cycle access time, and is thus the limiting factor.
As an example, the equations below are solved for zero wait states, assuming 16.78 MHz timing:
Address access time = 2.5 X 59.6 ns – 29 ns – 5 ns = 115 ns
Chip-select access time (MCU read cycle) = 2 X 59.6 ns – 25 ns – 5 ns = 89.2 ns
Chip-select access time (MCU write cycle) = 2 X 59.6 ns – 25 ns + 2 ns = 96.2 ns
The equations can also be solved for the number of wait states needed, given the memory speed. Use
Table 3 to find the number of wait states required for a particular memory speed. For example, with a
16.78 MHz clock, a memory with a write cycle time of 130 ns requires one wait state, since 130 ns is
between 89.2 ns and 148.8 ns.
2.9.2 Using Chip-Select Signals to Enable Boot Memory
The MCU CSBOOT chip-select circuit is always enabled from reset. Because the internal SRAM mod-
Table 2 Parameters Needed for Calculating Memory Access Times
Parameter
Symbol
16.78 MHz
20.97 MHz
Min
Max
Min
Max
Clock Period
tCYC
59.6 ns
—
47.7 ns
—
Clock Low to AS, DS, CS Asserted
tCLSA
2 ns
25 ns
0
23 ns
Data In Valid to Clock Low (Data Setup)
tDICL
5 ns
—
5 ns
—
Clock High to Address, FC, SIZE, RMC Valid
tCHAV
0
29 ns
0
23 ns
Clock Low to AS, DS, CS Negated
tCLSN
2 ns
29 ns
2 ns
23 ns
Table 3 Memory Access Times in Nanoseconds
Wait
States
16.78 MHz
20.97 MHz
Chip-Select Read Access
(Memory Write Access)
Address
Access
Chip-Select Read Access
(Memory Write Access)
Address
Access
F.T.
29.6
55.4
19.7
43.55
0
89.2
115.0
67.4
91.25
1
148.8
174.6
115.1
138.95
2
208.4
234.2
162.8
186.65
3
268.0
293.8
210.5
234.35
4
327.6
353.4
258.2
282.05
5
387.2
413
305.9
329.75
6
446.8
472.6
353.6
377.45
7
506.4
532.2
401.3
425.15
8
566.0
591.8
449.0
472.85
9
625.6
651.4
496.7
520.55
10
685.2
711
544.4
568.25
11
744.8
770.6
592.1
615.95
12
804.4
830.2
639.8
663.65
13
864.0
889.8
687.5
711.35
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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