參數(shù)資料
型號: CL-PD6722
廠商: Cirrus Logic, Inc.
英文描述: ISA-TOOPC-CARD HOST ADAPTERS
中文描述: ISA的TOOPC卡主機適配器
文件頁數(shù): 82/128頁
文件大?。?/td> 1591K
代理商: CL-PD6722
PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
82
VS1# AND VS2# VOLTAGE DETECTION
On the CL-PD6722, the B_GPSTB pin is programmed as a general-purpose read strobe. The VS1# and
VS2# pins from the A and B sockets are connected to the external half of a ’244 buffer as follows (which
allows Socket A VS1 and VS2 to appear as bits 0 and 1, and Socket B VS1 and VS2 to appear as bits 2
and 3):
Figure 13-1. VS1# and VS2# Sensing on a CL-PD6722
(Socket B Extension Control 2 bit 3 is ‘1’)
CL-PD6722
IOR*
IOR*
SD[15:0]
SD[15:0]
B_GPSTB
Tristate Buffer (such as 1/2 of a ’244)
D3
D0
OE
VS_RD*
SD[11:8]
+5V
5-V Supply
Socket A
Socket B
Pin 43
Pin 57
Pin 43
Pin 57
VS1#
VS2#
VS1#
VS2#
(16-bit bus)
Pull-up resistor, or set Extension Control 2 bit 2 to ‘1’ for totem-pole output.
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