參數(shù)資料
型號： CL-PD6722
廠商： Cirrus Logic, Inc.
英文描述： ISA-TOOPC-CARD HOST ADAPTERS
中文描述： ISA的TOOPC卡主機(jī)適配器
文件頁數(shù)： 32/128頁
文件大?。?/td> 1591K
代理商： CL-PD6722
PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
32
REGISTER DESCRIPTION CONVENTIONS
4.
REGISTER DESCRIPTION
CONVENTIONS
Register Headings
The description of each register starts with a
header containing the following information:
Special Function Bits
Following is a description of bits with special func-
tions:
a
When the register is socket-specific, the Index value given
in the register heading is for Socket A only. For the Socket
B register on the CL-PD6722, add 40h to the Index value of
the Socket A register.
Bit Naming Conventions
The following keywords are used within bit and
field names:
Read/Write Convention
Header Field
Description
Register Name
Indicates the register name.
Index
a
The Index value through which an inter-
nal register in an indexed register set is
accessed.
Register Per
Indicates whether the register affects
both sockets, marked chip or an individ-
ual socket, marked socket. If socket is
indicated, there are two registers being
described, each with a separate Index
value (one for each socket, A and B).
a
Register
Compatibility
Type
Indicates whether the register is
82365SL-compatible, marked 365 or a
register extension, marked ext
Bit Type
Description
Reserved
These bits are Reserved and should not
be changed.
Compatibility
Bit
These bits have no function on the
CL-PD67XX, but are included for com-
patibility with the 82365SL register set.
0 or 1
These read-only bits are forced to either
‘0’ or ‘1’ at reset and cannot be
changed.
Scratchpad Bit
These read/write bits are available for
use as bits of memory.
Keyword
Description
Enable
Indicates that the function described in
the rest of the bit name is active when
the bit is ‘1’.
Disable
Indicates that the function described in
the rest of the bit name is active when
the bit is ‘0’.
Mode
Indicates that the function of the bit
alters the interpretation of the values in
other registers.
Input
Indicates a bit or field that is read from a
pin.
Output
Indicates a bit or field that is driven to a
pin.
Select
Indicates that the bit or field selects
between multiple alternatives. Fields
that contain Select in their names have
an indirect mapping between the value
of the field and the effect.
Status
Indicates one of two types of bits: either
read-only bits used by the CL-PD67XX
to report information to the system, or
bits set by the CL-PD67XX in response
to an event, and can also be cleared by
the system. The system cannot directly
cause a Status bit to become ‘1’.
Value
Indicates that the bit or field value is
used as a number.
Bit Access
Description
RW:n
Bit is read/write and resets to value n
when PWRGOOD is cycled.
R
Bit is read-only and setting is deter-
mined by conditions noted. Set this bit
to ‘0’, or echo back value read.
R:n
Bit is read-only and resets to value n
when PWRGOOD is cycled. Set this bit
to ‘0’, or echo back value read.
R:n W:m
Bit is read/write and resets to value n
when PWRGOOD is cycled. Set this bit
to value monly.
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