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| 型號(hào)： | CL-PD6722 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | ISA的TOOPC卡主機(jī)適配器 |
| 文件頁(yè)數(shù)： | 70/128頁(yè) |
| 文件大?。?/td> | 1591K |
| 代理商： | CL-PD6722 |
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PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
70
EXTENSION REGISTERS
9.7.5
External Data (CL-PD6722 only, Socket A, Index 6Fh)
Bits 7:0 — External Data
This register is updated and accessed according to the setting of bits 3 and 4 of the Socket B
Ex-
tension Control 2
register (Index 6Fh, Extended Index 0Bh).
NOTE:
For software compatibility of external data access accross the Cirrus Logic PC Card host adapter product
line, the Socket B
External Data
register should only be used as a readport and not as a writeport. Also
for compatibility, only the lower nibble of
External Data
should be accessed and the upper nibble should be
ignored. For software compatibility with VS1# and VS2# detection software, when Socket B is used as a read
port, socket VS1# and VS2# signals should be connected to the external read buffer as shown in
Figure 13-1
on page 82
.
Refer to
Chapter 12
for more information on the use of the
External Data
register, and
Chapter 13
for more information on VS1# and VS2# detection.
Register Name:
External Data
Index:
6Fh only
Bit
7
Extended Index:
0Ah
Bit
4
Register Per: socket
Register Compatibility Type: ext.
Bit
1
Bit
6
Bit
5
Bit
3
Bit
2
Bit
0
External Data
7
External Data
6
External Data
5
External Data
4
External Data
3 or
B_VS2# Input
R:0
External Data
2 or
B_VS1# Input
R:0
External Data
1 or
A_VS2# Input
R:0
External Data
0 or
A_VS1# Input
R:0
RW:0
RW:0
RW:0
RW:0
Table 9-3.
Functions of Socket B External Data Register (CL-PD6722 only)
Socket B Extension Control 2
Function of Socket B External Data Register
Bit 4: GPSTB
on IOW*
Bit 3: GPSTB
on IOR*
0
0
Bits 7:4 — scratchpad
Bits 3:2 — Socket B VS2# and VS1# levels (CL-PD6722 only)
Bits 1:0 — Socket A VS2# and VS1# levels
0
1
External read port: B_GPSTB is a read buffer enable for external data on
SD[15:8].
1
0
External write port: B_GPSTB is a write latch enable for SD[15:8] to get
latched to an external register. Reads of Socket B External Data register pro-
duce the value written to the latch.
1
1
Reserved
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| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
| CL-PS7110 | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CL-PD6722-VC-B | 制造商:Cirrus Logic 功能描述:ELECTRONIC COMPONENT |
| CL-PD6729-QC-C | 制造商:BASIS 功能描述: |
| CLPD6729QCE | 制造商:BASIS 功能描述: |
| CL-PD6729-QC-E | 制造商:CIRRUS LOGIC 功能描述: |
| CL-PD6730-QC-B79030-648AC | 制造商:CL 功能描述:CL-PD6730-QC-B79030- |
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