- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379891 > CL-PD6722 (Cirrus Logic, Inc.) ISA-TOOPC-CARD HOST ADAPTERS PDF資料下載
參數(shù)資料
| 型號： | CL-PD6722 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | ISA的TOOPC卡主機適配器 |
| 文件頁數(shù)： | 30/128頁 |
| 文件大?。?/td> | 1591K |
| 代理商： | CL-PD6722 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁
PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
30
INTRODUCTION
3.1.14
DMA Mode Operation for the
CL-PD6722
A slave mode Direct Memory Access (DMA) feature
exists in the CL-PD6722. To use DMA mode, the
Interrupt and General Control
register, bit 5 must
be set to ‘1’ to operate the PC Card in I/O Card Inter-
face mode. PC Card interface DMA handshake sig-
nal options must also be selected. Refer to the
description of the
Extension Control 1
register on
page 66
as well as
Chapter 14
.
3.1.15
Selective Data Drive for I/O Windows
The CL-PD67XX can be programmed to drive only
some of the ISA bus data pins on reads from I/O win-
dows. This reduces data contention for I/O
addresses that include more than one peripheral. In
the standard IBM
PC AT, I/O map, floppy disk, and
hard disk share address 3F7h. The floppy disk
drives ISA-data-bus bit 7 on a read from 3F7h, and
the hard disk drives bits 6:0. To allow both floppy
disk controllers on the motherboard and hard disks
on the PC Card bus (or vice versa) to coexist, the
CL-PD67XX can be programmed through use of its
Data Mask registers to disable bit 7 on I/O reads at
addresses 3F7h and 377h. This is done by program-
ming up I/O windows to these addresses as part of
the task of configuring a socket for ATA drive support
(see
page 65
). Alternately, all bits except bit 7 can
also be disabled to allow the opposite case.
3.2
Host Access to Registers
The CL-PD67XX registers are accessed through an
8-bit indexing mechanism. An index register
scheme allows a large number of internal registers
to be accessed by the CPU using only two I/O
addresses.
The
Index
register (see
Chapter 5
) is used to spec-
ify which of the internal registers the CPU will
access next. The value in the
Index
register is called
the Register Index. This number specifies a unique
internal register. The
Data
register is used by the
CPU to read and write the internal register specified
by the
Index
register.
Figure 3-4. Indexed 8-Bit Register Structure
00h
01h
02h
FEh
FFh
3E1h
3E0h
Internal Registers
Register
Indexes
I/O Addresses
Data
Index
High Byte
Low Byte
相關PDF資料 |
PDF描述 |
|---|---|
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
| CL-PS7110 | Low-Power System-on-a-Chip |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CL-PD6722-VC-B | 制造商:Cirrus Logic 功能描述:ELECTRONIC COMPONENT |
| CL-PD6729-QC-C | 制造商:BASIS 功能描述: |
| CLPD6729QCE | 制造商:BASIS 功能描述: |
| CL-PD6729-QC-E | 制造商:CIRRUS LOGIC 功能描述: |
| CL-PD6730-QC-B79030-648AC | 制造商:CL 功能描述:CL-PD6730-QC-B79030- |
發(fā)布緊急采購，3分鐘左右您將得到回復。