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參數(shù)資料
| 型號(hào)： | CL-PD6722 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | ISA-TOOPC-CARD HOST ADAPTERS |
| 中文描述： | ISA的TOOPC卡主機(jī)適配器 |
| 文件頁(yè)數(shù)： | 72/128頁(yè) |
| 文件大小： | 1591K |
| 代理商： | CL-PD6722 |
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PRELIMINARY DATA SHEET v3.1
CL-PD6710/’22
ISA–to–PC-Card Host Adapters
May 1997
72
TIMING REGISTERS
10. TIMING REGISTERS
The following information about the timing registers is important:
G
All timing registers take effect immediately and should only be changed when the FIFO is empty (see the
FIFO Control
register on
page 60
).
G
Selection of Timing 0 or Timing 1 register sets is controlled by
I/O Window Control
, bit 3 and/or bit 7 (see
page 49
).
10.1 Setup Timing 0–1
There are two separate Setup Timing registers, each with identical fields. These registers are located at
the following indexes:
Index
3Ah
3Dh
Setup Timing
Setup Timing 0
Setup Timing 1
The Setup Timing register for each timing set controls how long a PC Card cycle’s command (that is, -OE,
-WE, -IORD, -IOWR; see page
16
) setup will be, in terms of the number of internal clock cycles.
The overall command setup number of clocks Sis programmed by selecting a 2-bit prescaling value (bits
7:6 of this register) representing weights of 1, 16, 256, or 8192, and then selecting a multiplier value (bits
5:0) to which that prescalar is multiplied to produce the overall command setup timing length according
to the following formula:
S
= (
N
pres
×
N
val
) + 1
Equation 10-1
The value of S representing the number of internal clock cycles for command setup, is then multiplied by
the internal clock’s period to determine the command setup time (see
Section 15.3.6
for further discussion).
Bits 5:0 — Setup Multiplier Value
This field indicates an integer value N
val
from 0 to 63; it is combined with a prescalar value (bits
7:6) to control the length of setup time before a command becomes active.
Bits 7:6 — Setup Prescalar Select
This field chooses one of four prescalar values N
pres
that are combined with the value of the Setup
Multiplier Value (bits 5:0) to control the length of setup time before a command becomes active.
Register Name:
Setup Timing 0–1
Index:
3Ah, 3Dh
Bit
7
Register Per: socket
Register Compatibility Type: 365
Bit
1
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
0
Setup Prescalar Select
Setup Multiplier Value
RW:00
RW:000001
00
01
10
11
N
pres
= 1
N
pres
= 16
N
pres
= 256
N
pres
= 8192
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL-PS6700 | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS6700-VC-A | Low-Power PC Card Controller for the CL-PS7111 |
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
| CL-PS7110 | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CL-PD6722-VC-B | 制造商:Cirrus Logic 功能描述:ELECTRONIC COMPONENT |
| CL-PD6729-QC-C | 制造商:BASIS 功能描述: |
| CLPD6729QCE | 制造商:BASIS 功能描述: |
| CL-PD6729-QC-E | 制造商:CIRRUS LOGIC 功能描述: |
| CL-PD6730-QC-B79030-648AC | 制造商:CL 功能描述:CL-PD6730-QC-B79030- |
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