參數(shù)資料
型號： ADUC7032BSTZ-8V-RL
廠商： Analog Devices Inc
文件頁數(shù)： 96/128頁
文件大?。?/td> 0K
描述： IC BATTERY SENSOR PREC 48-LQFP
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 7 of 128
ADUC7032 DATASHEET FIGURES
Figure 1: ADuC7032 Functional Block Diagram..........................1
Figure 2. SPI Master Mode Timing (PHASE Mode = 1)............15
Figure 3. SPI Master Mode Timing (PHASE Mode = 0)............16
Figure 4. SPI Slave Mode Timing (PHASE Mode = 1)...............17
Figure 5 : SPI Slave Mode Timing (PHASE Mode = 0)..............18
Figure 6 : LIN V1.3 Timing Specification ....................................19
Figure 7 : LIN V2.0 Timing Specification ....................................20
Figure 8 : Package Pin Configuration ...........................................22
Figure 9: ADuC7032 Register Organization................................27
Figure 10: Little Endian Format ....................................................28
Figure 11: ADuC7032 Memory Map...........................................28
Figure 12. Flash/EE Memory Data Retention .............................36
Figure 13: ADuC7032 Kernel Flowchart......................................39
Figure 14: Top Level MMR Map ...................................................40
Figure 15: Current ADC, Top Level Overview............................45
Figure 16 : Voltage/ Temperature ADC, Top Level Overview...46
Figure 17 : Example External Temperature Sensor Circuits......47
Figure 18: Internal Ground Switch Configuration .....................47
Figure 19 : Typical Digital Filter Response at FADC=1.0kHz
(ADCFLT = 0x0007) ..............................................................62
Figure 20 : ModifiedSinc3 Digital Filter Response at
FADC=1.0kHz (ADCFLT = 0x0087)...................................62
Figure 21 : Typical Digital Filter Response at FADC=8KHz,
(ADCFLT = 0x0000) ..............................................................62
Figure 22 : Typical Digital Filter Response at FADC=8KHz,
(ADCFLT = 0x4000) ..............................................................62
Figure 23 Typical Digital Filter Response at FADC=8KHz,
(ADCFLT = 0x961F)..............................................................63
Figure 24 : Typical Digital Filter Response at FADC=4Hz,
(ADCFLT = 0xBF1D) ............................................................63
Figure 25 : Typical Digital Filter Response at FADC=1Hz,
(ADCFLT = 0xBD1F..............................................................63
Figure 26: Typical Power-On Cycle ..............................................67
Figure 27: ADuC7032 System Clock Generation .......................68
Figure 28 : Example OSC0TRM Calibration Routine................72
Figure 29: Interrupt Structure .......................................................76
Figure 30 : Timer 0 block diagram................................................78
Figure 31 : Timer 1 Block Diagram ..............................................80
Figure 32 : Timer 2 block diagram................................................82
Figure 33 : Timer3 Block Diagram ..............................................84
Figure 34 : ADuC7032 GPIO.........................................................86
Figure 35 : High Voltage Interface, Top Level Block Diagram..97
Figure 36 : WU Circuit, Block Diagram ....................................104
Figure 37 : Fractional Divider Baud Rate generation...............106
Figure 38 : LIN I/O, Block Diagram ...........................................115
Figure 39 : LIN Interface Timing ...............................................119
Figure 40 : LIN Break Field..........................................................120
Figure 41 : LIN Synch byte Field .................................................120
Figure 42 : LIN Identifier Byte Field...........................................120
Figure 43 : LIN Data Byte Field...................................................121
Figure 44 : Example LIN Configuration ....................................123
Figure 45 : 48-Lead, Plastic Quad Flat Pack, (LQFP-48),
Dimensions shown in millimeters .....................................128
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