參數(shù)資料
型號(hào): ADUC7032BSTZ-8V-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 27/128頁(yè)
文件大小: 0K
描述: IC BATTERY SENSOR PREC 48-LQFP
標(biāo)準(zhǔn)包裝: 1
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設(shè)備: POR,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲(chǔ)器容量: 96KB(48K x 16)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 1.5K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱(chēng): ADUC7032BSTZ-8V-RLDKR
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Preliminary Technical Data
ADuC7032
Rev. PrD | Page 122 of 128
Example LIN Hardware Synchronization Routine
Consider the following C-Source Code LIN Initialization Routine.
void LIN_INIT(void )
{
char HVstatus;
GP2CON = 0x110000;// Enable LHS on GPIO Pins
LHSCON0 = 0x1; // Reset LHS Interface
do{
HVDAT = 0x02; // Enable Normal LIN TX mode
HVCON = 0x08; // Write to Config0
do{
HVstatus = HVCON;
}
while(HVstatus & 0x1); // Wait until command is finished
}
while (!(HVstatus & 0x4)); // transmit command is correct
while((LHSSTA & 0x20) == 0 )
{
// Wait until the LHS Hardware is reset
}
LHSCON1 = 0x062; // Sets Stop Edge as the fifth falling edge
// and the start edge as the first falling
// edge in the sync byte
LHSCON0 = 0x0114; // Gates UART RX Line, ensure no interference
// from the LIN into the UART.
// Selects the stop condition as a falling edge
// Enables Generation of an interrupt on the
// stop condition.
// Enables the interface
LHSVAL1 = 0x03F; // Set number of 131kHz periods to generate a Break Interrupt
// 0x3F / 131kHz ~ 480us which is just over 9.5 TBits.
}
Using this configuration, LHSVAL1 begins to count on the first
falling edge received on the LIN bus. If LHSVAL1 exceeds the
value written to LHSVAL1, in this case 0x3f, a Break Compare
interrupt is generated.
ON the next falling edge, LHSVAL0 begins counting. LHSVAL0
monitors the number of falling edges and compares this to the
value written to LHSCON1, in this example the number of
edges to monitor is the sixth falling edge of the LIN frame, or
the fifth falling edge of the SYNC byte. Once this number of
falling edges is received, a STOP condition interrupt is
generated. It is at this point that the UART is configured to
received the Protected Identifier.
The UART must not be ungated, via LHSCON0[8], before the
LIN bus returns high. If this occurs, UART communication
errors may occur. Example code to ensure this is shown below:
This process is shown in detail in Figure 44.
while((GP2DAT & 0x10 ) == 0 )
{}
// Wait until LIN Bus returns High
LHSCON0 = 0x4;
// Enable LHS to detect Break Condition Ungate RX Line
// Disable all interrupts except Break Compare Interrupt
IRQEN = 0x800;
// Enable UART Interrupt
// The UART is now configured and ready to be used for LIN
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