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參數(shù)資料
| 型號： | ADUC7032BSTZ-8V-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 116/128頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BATTERY SENSOR PREC 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 20.48MHz |
| 連通性： | LIN，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 9 |
| 程序存儲器容量： | 96KB（48K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 1.5K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 3.5 V ~ 18 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 2x16b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | ADUC7032BSTZ-8V-RLDKR |
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Preliminary Technical Data
ADuC7032
Rev. PrD | Page 88 of 128
GPIO Port0 Control Register :
Name :
GP0CON
Address :
0xFFFF0D00
Default Value :
0x00000000
Access :
Read/Write
Function :
The 32-bit MMR selects the pin function for each Port0 pin.
Table 49 : GP0CON MMR Bit Designations
Bit
Description
31-29
Reserved
These bits are reserved and should be written as 0 by user code
28
Reserved
This bit is reserved and should be written as 1 by user code
27-25
Reserved
These bits are reserved and should be written as 0 by user code
24
Internal P0.6 Enable Bit
This bit must be set to 1 by user software to enable the High Voltage Serial Interface before using the HVCON and HVDAT
registered high voltage interface
23-21
Reserved
These bits are reserved and should be written as 0 by user code
20
Internal P0.5 Enable Bit
This bit must be set to 1 by user software to enable the High Voltage Serial Interface before using the HVCON and HVDAT
registered high voltage interface
19-17
Reserved
These bits are reserved and should be written as 0 by user code
16
GPIO4 Function Select Bit
This bit is cleared by user code to 0 to configure the GPIO4 pin as a General Purpose I/O (GPIO) pin
This bit is set to 1 by user code to configure the GPIO4 pin as ECLK enabling a 2.56MHz clock output on this pin
15-13
Reserved
These bits are reserved and should be written as 0 by user code
12
GPIO3 Function Select Bit
This bit is cleared by user code to 0 to configure the GPIO3 pin as a General Purpose I/O (GPIO) pin
This bit is set to 1 by user code to configure the GPIO2 pin as MOSI, Master Output, Slave Input Data for the SPI Port
11-9
Reserved
These bits are reserved and should be written as 0 by user code
8
GPIO2 Function Select Bit
This bit is cleared to 0 by user code to configure the GPIO2 pin as a General Purpose I/O (GPIO) pin
This bit is set to 1 by user code to configure the GPIO3 pin as MISO, Master Input, Slave Output Data for the SPI Port
7-5
Reserved
These bits are reserved and should be written as 0 by user code
4
GPIO1 Function Select Bit
This bit is cleared to 0 by user code to configure the GPIO1 pin as a General Purpose I/O (GPIO) pin
This bit is set to 1 by user code to configure the GPIO1 pin as SCLK, Serial Clock I/O for the SPI Port
3-1
Reserved
These bits are reserved and should be written as 0 by user code
0
GPIO0 Function Select Bit
This bit is cleared to 0 by user code to configure the GPIO0 pin as a General Purpose I/O (GPIO) pin
This bit is set to 1 by user code to configure the GPIO0 pin as SS, Slave Select I/O for the SPI Port
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