參數(shù)資料
型號： ADUC7032BSTZ-8V-RL
廠商： Analog Devices Inc
文件頁數(shù)： 56/128頁
文件大?。?/td> 0K
描述： IC BATTERY SENSOR PREC 48-LQFP
標準包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 標準包裝
其它名稱： ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 33 of 128
Command Sequence for executing a Mass Erase
Giving the significance of the ‘Mass Erase’ command, a
specific code sequence must be executed to initiate this
operation.
1.
Set bit 3 in FEExMOD.
2.
Write 0xFFC3 in FEExADR
3.
Write 0x3CFF in FEExDAT
4.
Run the Mass Erase command 0x06 in FEExCON
This sequence is illustrated in the following example,:
FEExMOD= 0x08
FEExADR= 0xFFC3
FEExDAT= 0x3CFF
FEExCON= 0x06;
// Mass-Erase command
while (FEExSTA & 0x04){}
//Wait for command to finish
Note: To run the mass erase command via FEE0CON, Write
protection on the lower 64kbytes must be disabled, i.e.
FEE1HIDE/FEE1PRO are set to 0xFFFFFFFF.. This may
be done be first removing the protection or erasing the
lower 64kbytes first.
FEE0STA and FEE1STA Registers :
Name :
FEE0STA and FEE1STA
Address :
0xFFFF0E00 and 0xFFFF0E80
Default Value (both registers) :
0x00
Access :
ReadOnly
Function :
These 8-bit read only registers can be read by user code and reflect the current status of the Flash/EE memory
controllers.
Table 12: FEE0STA and FEE1STA MMR bit designations
Bit
Description (note x is 0 or 1 to designate Flash/EE Block 0 or 1)
15-4
Not Used
These bits are not used and will always read as 0.
3
Flash Interrupt Status Bit
Set automatically when an interrupt occurs, i.e. when a command is complete and the Flash/EE interrupt enable bit in the
FEExMOD register is set
Cleared automatically when the FEExSTA register is read by user code
2
Flash/EE controller busy
Set automatically when the Flash/EE controller is busy
Cleared automatically when the controller is not busy
1
Command fail
Set automatically when a command written to FEExCON completes unsuccessfully
Cleared automatically when the FEExSTA register is read by user code
0
Command Successful
Set automatically by MCU when a command is completed successfully.
Cleared automatically when the FEExSTA register is read by user code
FEE0ADR and FEE1ADR Registers:
Name :
FEE0ADR and FEE1ADR
Address :
0xFFFF0E10 and 0xFFFF0E90
Default Value :
Non Zero
Access :
Read/Write Access
Function :
This 16-bit register dictates the address
upon which any Flash/EE command
executed via FEExCON will act upon.
FEE0DAT and FEE1DAT Registers:
Name :
FEE0DAT and FEE1DAT
Address :
0xFFFF0E0C and 0xFFFF0E8C
Default Value :
Non Zero
Access :
Read/Write Access
Function
:
This 16-bit register contains the data either
read from or to be written to the Flash/EE
memory.
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