
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 2 of 128
TABLE OF CONTENTS
TABLE OF CONTENTS................................................... 2
ADUC7032 DATASHEET TABLES................................. 5
ADUC7032 DATASHEET FIGURES .............................. 7
ADUC7032SPECIFICATIONS ........................................ 8
ELECTRICAL SPECIFICATIONS............................................ 8
TIMING SPECIFICATIONS ................................................. 15
SPI Timing Specifications........................................... 15
LIN Timing Specifications .......................................... 19
SPECIFICATION TERMINOLOGY............................. 21
ABSOLUTE MAXIMUM RATINGS ............................ 22
ORDERING GUIDE ........................................................... 22
ESD Caution............................................................... 22
PIN FUNCTION DESCRIPTIONS ............................... 23
ADUC7032 GENERAL DESCRIPTION....................... 26
OVERVIEW OF THE ARM7TDMI CORE ........................... 26
ARM7 Exceptions ....................................................... 27
ARM Registers............................................................ 27
Interrupt latency ......................................................... 28
MEMORY ORGANISATION ................................................ 28
Memory Format.......................................................... 28
SRAM.......................................................................... 28
Remap......................................................................... 29
Remap operation ........................................................ 29
SYSMAP0 Register :................................................... 29
ADUC7032 RESET.......................................................... 30
RSTCLR Register : ..................................................... 30
RSTSTA Register : ...................................................... 30
FLASH/EE MEMORY AND THE ADUC7032...................... 31
FLASH/EE MEMORY CONTROL INTERFACE...................... 31
FEE0CON and FEE1CON Registers :....................... 32
FEE0STA and FEE1STA Registers :........................... 33
FEE0ADR and FEE1ADR Registers:......................... 33
FEE0DAT and FEE1DAT Registers:.......................... 33
FEE0MOD and FEE1MOD Registers : ..................... 34
FLASH/EE MEMORY SECURITY........................................ 34
Block0, Flash/EE Memory Protection Registers :...... 35
Block1, Flash/EE Memory Protection Registers :...... 35
FLASH/EE MEMORY RELIABILITY .................................. 36
CODE EXECUTION TIME FROM SRAM AND FLASH/EE 37
Execution from SRAM ................................................ 37
Execution from Flash/EE ........................................... 37
ADUC7032 KERNEL ....................................................... 38
MEMORY MAPPED REGISTERS ........................................ 40
16-BIT
Σ ANALOG TO DIGITAL CONVERTERS. 45
CURRENT CHANNEL ADC (I-ADC) ................................ 45
VOLTAGE CHANNEL ADC (V-ADC)................................46
TEMPERATURE CHANNEL ADC (T-ADC)........................46
ADC GROUND SWITCH ...................................................47
ADC NOISE PERFORMANCE TABLES ...............................48
ADC MMR INTERFACE...................................................49
ADC Status Register : .................................................49
ADC Interrupt Mask Register :...................................50
ADC Mode Register : .................................................51
Current Channel ADC Control Register :...................52
Voltage Channel ADC Control Register : ...................53
Temperature Channel ADC Control Register : ...........54
ADC Filter Register : .................................................55
ADC Configuration Register : ....................................57
Current Channel ADC Data Register :.......................58
Voltage Channel Data Register: .................................58
Temperature Channel ADC Data Register : ...............58
ADC FIFO Register : .................................................58
Current Channel ADC Offset Calibration Register :..58
Voltage Channel Offset Calibration Register : ...........58
Temperature Channel Offset Calibration Register: ....58
Current Channel ADC Gain Calibration Register : ...59
Voltage Channel Gain Calibration Register :.............59
Temperature Channel Gain Calibration Register :.....59
Current Channel ADC Result Counter Limit Register:
....................................................................................59
Current Channel ADC Result Count Register: ...........59
Current Channel ADC Threshold Register:................59
Current Channel ADC Threshold Count Limit Register:
....................................................................................59
Current Channel ADC Threshold Count Register: .....60
Current Channel ADC Accumulator Register: ...........60
Current Channel ADC Accumulator Threshold
Register: .....................................................................60
Low Power Voltage Reference Scaling Factor............60
ADC POWER MODES OF OPERATION...............................60
ADC Startup Procedure ..............................................60
ADC Normal Power Mode..........................................61
ADC Low Power Mode...............................................61
ADC Low Power-Plus Mode.......................................61
ADC Sinc3 Digital Filter Response ............................61
ADC Calibration.........................................................64
Using the Offset and Gain Calibration Registers .......64
Understanding the Offset and Gain Calibration
Registers .....................................................................65
ADC DIAGNOSTICS.........................................................65
Current ADC Diagnostics...........................................65
Temperature ADC Diagnostics ...................................66
POWER SUPPLY SUPPORT CIRCUITS .....................67
ADUC7032 SYSTEM CLOCKS .....................................68
PLLSTA Register : ......................................................69
PLLCON Pre-write Key PLLKEY0: ...........................70