參數(shù)資料
型號： ADUC7032BSTZ-8V-RL
廠商： Analog Devices Inc
文件頁數(shù)： 84/128頁
文件大?。?/td> 0K
描述： IC BATTERY SENSOR PREC 48-LQFP
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 59 of 128
Current Channel ADC Gain Calibration Register :
Name :
ADC0GN
Address :
0xFFFF053C
Default Value :
Part Specific, factory programmed
Access :
Read/Write
Function :
This Gain MMR holds a 16-bit gain
calibration coefficient for scaling the I-ADC conversion result.
The register is configured at power-on with a factory default
value. However, this register will be automatically overwritten if
aa gain calibration of the I-ADC is initiated by the user via bits
in the ADCMDE MMR. User code can only write to this
calibration register if the ADC is in idle mode. An ADC must
be enabled and in idle mode before written to any Offset or
Gain Register. A delay of 23us should be included before
ADCMDE is modified.
Voltage Channel Gain Calibration Register :
Name :
ADC1GN
Address :
0xFFFF0540
Default Value :
Part Specific, factory programmed
Access :
Read/Write
Function
:
This Gain MMR holds a 16-bit gain
calibration coefficient for scaling a voltage channel conversion
result. The register is configured at power-on with a factory
default value. However, this register will be automatically
overwritten if a gain calibration of the voltage channel is
initiated by the user via bits in the ADCMDE MMR. User code
can only write to this calibration register if the ADC is in idle
mode. An ADC must be enabled and in idle mode before
written to any Offset or Gain Register. A delay of 23us should
be included before ADCMDE is modified.
Temperature Channel Gain Calibration Register :
Name :
ADC2GN
Address :
0xFFFF0544
Default Value :
Part Specific, factory programmed
Access :
Read/Write
Function
:
This Gain MMR holds a 16-bit gain
calibration coefficient for scaling a temperature channel
conversion result. The register is configured at power-on with a
factory default value. However, this register will be
automatically overwritten if a gain calibration of the
temperature channel is initiated by the user via bits in the
ADCMDE MMR. User code can only write to this calibration
register if the ADC is in idle mode. An ADC must be enabled
and in idle mode before written to any Offset or Gain Register.
A delay of 23us should be included before ADCMDE is
modified.
Current Channel ADC Result Counter Limit
Register:
Name :
ADC0RCL
Address :
0xFFFF0548
Default Value :
0x0001
Access :
Read/Write
Function
:
This 16-bit MMR sets the number of
conversions required before an ADC interrupt is generated. By
default this register is set to 0x01. The ADC counter function
must be enabled via the ADC Result Counter Enable bit in the
ADCCFG MMR.
Current Channel ADC Result Count Register:
Name :
ADC0RCV
Address :
0xFFFF054C
Default Value :
0x0000
Access :
Read Only
Function
:
This 16-bit, Read Only MMR holds the
current number of I-ADC conversion results. It is used in
conjunction with ADC0RCL to mask I-ADC interrupts,
generating a lower interrupt rate. Once ADC0RCV=ADC0RCL,
the value is ADC0RCV resets to 0 and recommences counting.
It can also be used in conjunction with the Accumulator
(ADC0ACC) to allow an average current calculation to be
undertaken. The result counter is enabled via ADCCFG[0].
This MMR is also reset to 0 when the I-ADC is reconfigured i.e.
when the ADC0CON or ADCMDE are written.
Current Channel ADC Threshold Register:
Name :
ADC0TH
Address :
0xFFFF0550
Default Value :
0x0000
Access :
Read/Write
Function :
This 16-bit MMR sets the threshold against
which the absolute value of the I-ADC conversion result is
compared. In Unipolar mode ADC0TH [15:0] are compared
and in 2’s compliment mode ADC0TH[14:0] are compared.
Current Channel ADC Threshold Count Limit
Register:
Name :
ADC0TCL
Address :
0xFFFF0554
Default Value :
0x01
Access :
Read/Write
Function
:
This 8-bit MMR determines how many
cumulative(given values below the threshold will decrement or
reset the count to 0) I-ADC conversion result readings above
ADC0TH must occur before the I-ADC Comparator Threshold
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