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型號(hào)：	UPD70F3357GJ(A)-GAE-AX
元件分類：	微控制器/微處理器
英文描述：	32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP144
封裝：	20 X 20 MM, LEAD FREE, PLASTIC, LQFP-144
文件頁數(shù)：	608/1119頁
文件大小：	6653K
代理商：	UPD70F3357GJ(A)-GAE-AX

CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)

User’s Manual U17790EJ2V0UD

15.8 Cautions

(1) When the clock supply to UARTAn is stopped (for example, in IDLE1, IDLE2, or STOP mode), the operation

stops with each register retaining the value it had immediately before the clock supply was stopped. The

TXDAn pin output also holds and outputs the value it had immediately before the clock supply was stopped.

However, the operation is not guaranteed after the clock supply is resumed. Therefore, after the clock supply

is resumed, the circuits should be initialized by setting the UAnCTL0.UAnPWR, UAnCTL0.UAnRXEn, and

UAnCTL0.UAnTXEn bits to 000.

(2) The RXDA1 and KR7 pins must not be used at the same time. To use the RXDA1 pin, do not use the KR7 pin.

To use the KR7 pin, do not use the RXDA1 pin (it is recommended to set the PFC91 bit to 1 and clear

PFCE91 bit to 0).

(3) In UARTAn, the interrupt caused by a communication error does not occur. When performing the transfer of

transmit data and receive data using DMA transfer, error processing cannot be performed even if errors (parity,

overrun, framing) occur during transfer.

Either read the UAnSTR register after DMA transfer has been

completed to make sure that there are no errors, or read the UAnSTR register during communication to check

(4) Start up the UARTAn in the following sequence.

<1> Set the UAnCTL0.UAnPWR bit to 1.

<2> Set the ports.

<3> Set the UAnCTL0.UAnTXE bit to 1, UAnCTL0.UAnRXE bit to 1.

(5) Stop the UARTAn in the following sequence.

<1> Set the UAnCTL0.UAnTXE bit to 0, UAnCTL0.UAnRXE bit to 0.

<2> Set the ports and set the UAnCTL0.UAnPWR bit to 0 (it is not a problem if port setting is not changed).

(6) In transmit mode (UAnCTL0.UAnPWR bit = 1 and UAnCTL0.UAnTXE bit = 1), do not overwrite the same value

to the UAnTX register by software because transmission starts by writing to this register. To transmit the same

value continuously, overwrite the same value.

(7) In continuous transmission, the communication rate from the stop bit to the next start bit is extended 2 base

clocks more than usual. However, the reception side initializes the timing by detecting the start bit, so the

reception result is not affected.

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