
CHAPTER 1 INTRODUCTION
User’s Manual U17790EJ2V0UD
29
1.6.2
Internal units
(1) CPU
The CPU uses five-stage pipeline control to enable single-clock execution of address calculations, arithmetic
logic operations, data transfers, and almost all other instruction processing.
Other dedicated on-chip hardware, such as a multiplier (16 bits
× 16 bits → 32 bits) and a barrel shifter (32
bits) contribute to faster complex processing.
(2) Bus control unit (BCU)
The BCU starts a required external bus cycle based on the physical address obtained by the CPU. When an
instruction is fetched from external memory space and the CPU does not send a bus cycle start request, the
BCU generates a prefetch address and prefetches the instruction code. The prefetched instruction code is
stored in an instruction queue.
(3) ROM
This is a 1024/768/640/512/384 KB flash memory mapped to addresses 0000000H to 00FFFFFH/0000000H to
00BFFFFH/0000000H to 009FFFFH//0000000H to 007FFFFH/0000000H to 005FFFFH. It can be accessed
from the CPU in one clock during instruction fetch.
(4) RAM
This
is
a
60/48/40/32
KB
RAM
mapped
to
addresses
3FF0000H
to
3FFEFFFH/3FF3000H
to
3FFEFFFH/3FF5000H to 3FFEFFFH /3FF7000H to 3FFEFFFH. It can be accessed from the CPU in one
clock during data access.
(5) Interrupt controller (INTC)
This controller handles hardware interrupt requests (NMI, INTP0 to INTP8) from on-chip peripheral hardware
and external hardware. Eight levels of interrupt priorities can be specified for these interrupt requests, and
multiple servicing control can be performed.
(6) Clock generator (CG)
A main clock oscillator that generates the main clock oscillation frequency (fX) and a subclock oscillator that
generates the subclock oscillation frequency (fXT) are available. As the main clock frequency (fXX), fX is used as
is in the clock-through mode and is multiplied by four or eight in the PLL mode.
The CPU clock frequency (fCPU) can be selected from seven types: fXX, fXX/2, fXX/4, fXX/8, fXX/16, fXX/32, and fXT.
(7) Internal oscillator
An internal oscillator is provided on chip. The oscillation frequency is 220 kHz (TYP.). An internal oscillator
supplies the clock for watchdog timer 2 and timer M.
(8) Timer/counter
Nine-channel 16-bit timer/event counter P (TMP), one-channel 16-bit timer/event counter Q (TMQ), and one-
channel 16-bit interval timer M (TMM) are provided on chip.
(9) Watch timer
This timer counts the reference time period (0.5 s) for counting the clock (the 32.768 kHz from the subclock or
the 32.768 kHz fBRG from prescaler 3). The watch timer can also be used as an interval timer for the main
clock.