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型號(hào)：	UPD70F3357GJ(A)-GAE-AX
元件分類：	微控制器/微處理器
英文描述：	32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP144
封裝：	20 X 20 MM, LEAD FREE, PLASTIC, LQFP-144
文件頁(yè)數(shù)：	1058/1119頁(yè)
文件大?。?/td>	6653K
代理商：	UPD70F3357GJ(A)-GAE-AX

CHAPTER 22 INTERRUPT/EXCEPTION PROCESSING FUNCTION

User’s Manual U17790EJ2V0UD

(5) Noise elimination control register (NFC)

Digital noise elimination can be selected for the INTP3 pin. The noise elimination settings are performed using

the NFC register.

When digital noise elimination is selected, the sampling clock for digital sampling can be selected from among

fXX/64, fXX/128, fXX/256, fXX/512, fXX/1,024, and fXT. Sampling is performed three times.

When digital noise elimination is selected, if the clock that performs sampling in the standby mode is stopped,

then the INTP3 interrupt request signal cannot be used for releasing the standby mode. When fXT is used as

the sampling clock, the INTP3 interrupt request signal can be used for releasing either the subclock operating

mode or the IDLE1/IDLE2/STOP/sub-IDLE mode.

This register can be read or written in 8-bit units.

Reset sets this register to 00H.

After the sampling clock has been changed, it takes 3 sampling clocks to initialize the digital

noise eliminator. Therefore, if an INTP3 valid edge is input within these 3 sampling clocks

after the sampling clock has been changed, an interrupt request signal may be generated.

Therefore, be careful about the following points when using the interrupt and DMA functions.

When using the interrupt function, after the 3 sampling clocks have elapsed, enable

interrupts after the interrupt request flag (PIC3.PIF3 bit) has been cleared.

When using the DMA function (started by INTP3), enable DMA after 3 sampling clocks

have elapsed.

fXT (subclock)

Digital sampling clock

Setting prohibited

After reset: 00H

Address: FFFFF318H

Analog noise elimination (60 ns (TYP.))

Digital noise elimination

Settings of INTP3 pin noise elimination

Other than above

Remarks 1. Since sampling is performed three times, the reliably eliminated noise width is 2 sampling clocks.

2. In the case of noise with a width smaller than 2 sampling clocks, an interrupt request signal is

generated if noise synchronized with the sampling clock is input.

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