
CHAPTER 4 PORT FUNCTIONS
User’s Manual U17790EJ2V0UD
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4.6.2
Cautions on bit manipulation instruction for port n register (Pn)
When a 1-bit manipulation instruction is executed on a port that provides both input and output functions, the value
of the output latch of an input port that is not subject to manipulation may be written in addition to the targeted bit.
Therefore, it is recommended to rewrite the output latch when switching a port from input mode to output mode.
<Example>
When P90 pin is an output port, P91 to P97 pins are input ports (all pin statuses are high level), and
the value of the port latch is 00H, if the output of P90 pin is changed from low level to high level via
a bit manipulation instruction, the value of the port latch is FFH.
Explanation: The targets of writing to and reading from the Pn register of a port whose PMnm bit is
1 are the output latch and pin status, respectively.
A bit manipulation instruction is executed in the following order in the V850ES/SJ3.
<1> The Pn register is read in 8-bit units.
<2> The targeted one bit is manipulated.
<3> The Pn register is written in 8-bit units.
In step <1>, the value of the output latch (0) of P90 pin, which is an output port, is read, while the
pin statuses of P91 to P97 pins, which are input ports, are read. If the pin statuses of P91 to P97
pins are high level at this time, the read value is FEH.
The value is changed to FFH by the manipulation in <2>.
FFH is written to the output latch by the manipulation in <3>.
Figure 4-43. Bit Manipulation Instruction (P90 Pin)
Low-level output
Bit manipulation
instruction
(set1 0, P9L[r0])
is executed for
P90 bit.
Pin status: High level
P90
P91 to P97
Port 9L latch
00000000
High-level output
Pin status: High level
P90
P91 to P97
Port 9L latch
11111111
Bit manipulation instruction for P90 bit
<1> P9L register is read in 8-bit units.
In the case of P90, an output port, the value of the port latch (0) is read.
In the case of P91 to P97, input ports, the pin status (1) is read.
<2> Set (1) P90 bit.
<3> Write the results of <2> to the output latch of P9L register in 8-bit units.