
CHAPTER 12 REAL-TIME OUTPUT FUNCTION (RTO)
User’s Manual U17790EJ2V0UD
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(1) Real-time output buffer registers nL, nH (RTBLn, RTBHn)
The RTBLn and RTBHn registers are 4-bit registers that hold preset output data.
These registers are mapped to independent addresses in the peripheral I/O register area.
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
If an operation mode of 4 bits
× 1 channel or 2 bits × 1 channel is specified (RTPCn.BYTEn bit = 0), data can
be individually set to the RTBLn and RTBHn registers. The data of both these registers can be read at once
by specifying the address of either of these registers.
If an operation mode of 6 bits
× 1 channel is specified (BYTEn bit = 1), 8-bit data can be set to both the RTBLn
and RTBHn registers by writing the data to either of these registers.
Moreover, the data of both these
registers can be read at once by specifying the address of either of these registers.
Table 12-2 shows the operation when the RTBLn and RTBHn registers are manipulated.
0
RTBLn
RTBHn
0
RTBHn5 RTBHn4
RTBLn3
RTBLn2
RTBLn1
RTBLn0
After reset: 00H
R/W
Address: RTBL0 FFFFF6E0H, RTBH0 FFFFF6E2H,
RTBL1 FFFFF6F0H, RTBH1 FFFFF6F2H
Cautions 1. When writing to bits 6 and 7 of the RTBHn register, always write 0.
2. Accessing the RTBLn and RTBHn registers is prohibited in the following
statuses. For details, refer to 3.4.9 (2) Accessing specific on-chip peripheral
I/O registers.
When the CPU operates with the subclock and the main clock oscillation is
stopped
When the CPU operates with the internal oscillation clock
Remark
n = 0, 1
Table 12-2. Operation During Manipulation of RTBLn and RTBHn Registers
Read
Write
Note
Operation Mode
Register to Be
Manipulated
Higher 4 Bits
Lower 4 Bits
Higher 4 Bits
Lower 4 Bits
RTBLn
RTBHn
RTBLn
Invalid
RTBLn
4 bits
× 1 channel,
2 bits
× 1 channel
RTBHn
RTBLn
RTBHn
Invalid
RTBLn
RTBHn
RTBLn
RTBHn
RTBLn
6 bits
× 1 channel
RTBHn
RTBLn
RTBHn
RTBLn
Note After setting the real-time output port, set output data to the RTBLn and RTBHn registers by the time a real-
time output trigger is generated.