
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
User’s Manual U17790EJ2V0UD
398
Figure 8-27. Software Processing Flow in PWM Output Mode (2/2)
START
<1> Count operation start flow
TQ0CE bit = 1
Register initial setting
TQ0CTL0 register
(TQ0CKS0 to TQ0CKS2 bits)
TQ0CTL1 register,
TQ0IOC0 register,
TQ0IOC2 register,
TQ0CCR0 to TQ0CCR3
registers
Initial setting of these
registers is performed
before setting the
TQ0CE bit to 1.
Only writing of the TQ0CCR1
register must be performed
when the set duty factor is only
changed after writing the
TQ0CCR2 and TQ0CCR3
registers.
When the counter is cleared after
setting, the value of the
TQ0CCRm register is transferred
to the CCRm buffer register.
TQ0CCR1 register writing of the
same value is necessary only
when the set duty factor of
TOQ02 and TOQ03 pin
outputs is changed.
When the counter is
cleared after setting,
the value of the TQ0CCRm
register is transferred to
the CCRm buffer register.
Only writing of the TQ0CCR1
register must be performed when
the set duty factor is only changed.
When counter is cleared after
setting, the value of the TQ0CCRm
register is transferred to the CCRm
buffer register.
Counting is stopped.
The TQ0CKS0 to
TQ0CKS2 bits can be
set at the same time
when counting is
enabled (TQ0CE bit = 1).
Writing of the TQ0CCR1
register must be performed
after writing the TQ0CCR0,
TQ0CCR2, and TQ0CCR3
registers.
When the counter is cleared
after setting, the value
of the TQ0CCRm register is
transferred to the CCRm buffer
registers.
TQ0CCR1 writing
of the same value is
necessary only when the
set cycle is changed.
<2> TQ0CCR0 to TQ0CCR3 register
setting change flow
<3> TQ0CCR0 register setting change flow
<4> TQ0CCR1 to TQ0CCR3 register
setting change flow
<5> TQ0CCR2, TQ0CCR3 register
setting change flow
<6> TQ0CCR1 register setting change flow
<7> Count operation stop flow
TQ0CE bit = 0
Setting of TQ0CCR2,
TQ0CCR3 registers
Setting of TQ0CCR1 register
Setting of TQ0CCR2,
TQ0CCR3 registers
Setting of TQ0CCR1 register
STOP
Setting of TQ0CCR1 register
Setting of TQ0CCR0 register
Setting of TQ0CCR1 register
Setting of TQ0CCR0, TQ0CCR2,
and TQ0CCR3 registers
TQ0CCR1 register
When the counter is
cleared after setting, the
value of the TQ0CCRm
register is transferred to
the CCRm buffer register.
Remark
k = 1 to 3
m = 0 to 3