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3-16
SYM53C876/876E Data Manual
Signal Descriptions
ROM/Flash Interface Pins
ROM/Flash Interface Pins
Table 3-10: ROM/Flash Interface Pins
Pin Name
Pin/Ball
Number
Type
Strength
Description
MAS0/
190, C8
O
4 mA
Memory Address Strobe 0
. This pin can latch in the
least significant address byte of an external EPROM or
flash memory. Since the SYM53C876E moves addresses
eight bits at a time, this pin connects to the clock of an
external bank of flip-flops which are used to assemble up
to a 20-bit address for the external memory. If an exter-
nal memory requires more than 16 bits of addressing as
specified by the pulldown resistors at power up and bit 0
in the expansion ROM Base Address register, see the
External Memory Interface diagram for proper usage.
Memory Address Strobe 1.
This pin can latch in the
address byte corresponding to address bits 15-8 of an
external EPROM or flash memory. Since the
SYM53C876E moves addresses eight bits at a time, this
pin connects to the clock of an external bank of flip-flops
which assemble up to a 20-bit address for the external
memory. If an external memory requires more than 16
bits of addressing as specified by the pulldown resistors
at power up and bit 0 in the expansion ROM Base
Address register, see the External Memory Interface dia-
gram for proper usage.
Memory Address/Data Bus.
This bus is used in con-
junction with the memory address strobe pins and exter-
nal address latches to assemble up to a 20-bit address for
an external EPROM or flash memory. This bus puts out
the least significant byte first and finishes with the most
significant bits. It is also used to write data to a flash
memory or read data into the chip from external
EPROM/flash memory. All MAD pins have internal
pull-up resistors.
Memory Write Enable.
This pin is used as a write
enable signal to an external flash memory.
Memory Output Enable.
This pin is used as an output
enable signal to an external EPROM or flash memory
during read operations. It is also used to test the connec-
tivity of the SYM53C876E signals in the “AND-tree”
test mode. This pin is only driven as the Test Out func-
tion when the TESTIN/ pin is driven low.
Memory Chip Enable.
This pin is used as a chip
enable signal to an external EPROM or flash memory
device.
MAS1/
189, B8
O
4 mA
MAD7-0
74, 76,
77, 79,
80, 81,
82, 83,
U9, W9,
Y9, V10,
Y10, Y11,
W11, V11
I/O
4 mA
MWE/
191, A7
O
4 mA
MOE/_TESTOUT
192, B7
O
4 mA
MCE/
193, A6
O
4 mA