參數(shù)資料
型號(hào)： SYM53C876
廠商： LSI Corporation
英文描述： PCI-Dual Channel SCSI Multi-Function Controller(PCI 雙通道SCSI多功能控制器)
中文描述： 的PCI -雙通道SCSI多功能控制器（雙通道的PCI的SCSI多功能控制器）
文件頁(yè)數(shù)： 129/285頁(yè)
文件大?。?/td> 3341K
代理商： SYM53C876
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SYM53C876/876E Data Manual
4-37
Registers
SCSI Registers
Register 14h
Interrupt Status (ISTAT)
Read/Write
This is the only register that is accessible by the
host CPU while a SYM53C876 SCSI function is
executing SCRIPTS (without interfering in the
operation of the function). It polls for interrupts if
hardware interrupts are disabled. Read this regis-
ter after servicing an interrupt to check for
stacked interrupts. For more information on
interrupt handling refer to Chapter 2, “Func-
tional Description.”
Bit 7
ABRT (Abort Operation)
Setting this bit aborts the current operation
under execution by the SYM53C876 SCSI
function. If this bit is set and an interrupt is
received, reset this bit before reading the
DSTAT register to prevent further aborted
interrupts from being generated. The
sequence to abort any operation is:
1. Set this bit.
2. Wait for an interrupt.
3. Read the ISTAT register.
4. If the SCSI Interrupt Pending bit is set, then
read the SIST0 or SIST1 register to
determine the cause of the SCSI Interrupt
and go back to Step 2.
5. If the SCSI Interrupt Pending bit is clear, and
the DMA Interrupt Pending bit is set, then
write 00h value to this register.
6. Read the DSTAT register to verify the aborted
interrupt and to see if any other interrupting
conditions have occurred.
Bit 6
SRST (Software Reset)
Setting this bit resets the SYM53C876 SCSI
function. All operating registers are cleared to
their respective default values and all SCSI
signals are deasserted. Setting this bit does not
assert the SCSI RST/ signal. This reset does
not clear the ID Mode bit or any of the PCI
configuration registers. This bit is not self-
clearing; it must be cleared to clear the reset
condition (a hardware reset also clears this
bit).
Bit 5
SIGP (Signal Process)
SIGP is a R/W bit that is writable at any time,
and polled and reset via CTEST2. The SIGP
bit is used in various ways to pass a flag to or
from a running SCRIPTS instruction.
The only SCRIPTS instruction directly
affected by the SIGP bit is Wait For Selection/
Reselection. Setting this bit causes that
instruction to jump to the alternate address
immediately. The instructions at the alternate
jump address should check the status of SIGP
to determine the cause of the jump. The SIGP
bit is usable at any time and is not restricted to
the wait for selection/ reselection condition.
Bit 4
SEM (Semaphore)
The SCRIPTS processor may set this bit
using a SCRIPTS register write instruction.
An external processor may also set it while the
SYM53C876 SCSI function is executing a
SCRIPTS operation. This bit enables the
SCSI function to notify an external processor
of a predefined condition while SCRIPTS are
running. The external processor may also
notify the SYM53C876 SCSI function of a
predefined condition and the SCRIPTS pro-
cessor may take action while SCRIPTS are
executing.
Bit 3
CON (Connected)
This bit is automatically set any time the
SYM53C876 SCSI function is connected to
the SCSI bus as an initiator or as a target. It is
set after successfully completing selection or
when the SYM53C876 SCSI function
responds to a bus-initiated selection or rese-
lection. It is also set after the SCSI function
ABRT
7
Default >>>
0
SRST
6
SIGP
5
SEM
4
CON
3
INTF
2
SIP
1
DIP
0
0
0
0
0
0
0
0
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