
SYM53C876/876E Data Manual
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Functional Description
SCSI Functional Description
SCSI Functional
Description
Two SCSI Controllers
The SYM53C876 provides two SCSI control-
lers on a single chip. Each SCSI controller
provides a SCSI function that supports an 8-
bit or 16-bit bus. Each supports Ultra SCSI
synchronous transfer rates up to 40 MB/s,
Ultra SCSI synchronous transfer rates up to
20 MB/s, and asynchronous transfer rates up
to 14 MB/s on a wide SCSI bus. The SCSI
functions are programmed with SCSI
SCRIPTS, making it easy to “fine tune” the
system for specific mass storage devices or
SCSI-2 requirements.
The SYM53C876 offers low-level register
access or a high-level control interface. Like
first generation SCSI devices, the
SYM53C876 is accessed as a register-oriented
device. The ability to sample and/or assert any
signal on the SCSI bus is used in error recov-
ery and diagnostic procedures. In support of
SCSI loopback diagnostics, each SCSI func-
tion may perform a self-selection and operate
as both an initiator and a target.
The SYM53C876 is controlled by the inte-
grated SCRIPTS processor through a high-
level logical interface. Commands controlling
the SCSI functions are fetched out of the
main host memory or local memory. These
commands instruct the SCSI functions to
Select, Reselect, Disconnect, Wait for a Dis-
connect, Transfer Information, Change Bus
Phases and, in general, implement all aspects
of the SCSI protocol. The SCRIPTS proces-
sor is a special high-speed processor optimized
for SCSI protocol.
SCRIPTS Processor
The SCSI SCRIPTS processor allows both
DMA and SCSI commands to be fetched
from host memory or internal SCRIPTS
RAM. Algorithms written in SCSI SCRIPTS
control the actions of the SCSI and DMA
cores. The SCRIPTS processor executes com-
plex SCSI bus sequences independently of the
host
CPU.
Algorithms may be designed to tune SCSI bus
performance, to adjust to new bus device
types (such as scanners, communication gate-
ways, etc.), or to incorporate changes in the
SCSI-2 or SCSI-3 logical bus definitions
without sacrificing I/O performance. SCSI
SCRIPTS are hardware- independent, so they
can be used interchangeably on any host or
CPU system bus.
Internal SCRIPTS RAM
The SYM53C876 has 4KB (1024 x 32 bits)
of internal, general purpose RAM for each
SCSI function. The RAM is designed for
SCRIPTS program storage, but is not limited
to this type of information. When the chip
fetches SCRIPTS instructions or Table Indi-
rect information from the internal RAM,
these fetches remain internal to the chip and
do not use the PCI bus. Other types of access
to the RAM by the chip use the PCI bus, as if
they were external accesses. The MAD5 pin
disables the 4K internal RAM. To disable the
internal RAM, connect a 4.7K
resistor
between the MAD5 pin and V
SS
(ground).
The SCRIPTS RAM by default powers-up
enabled.
The RAM can be relocated by the PCI system
BIOS anywhere in 32-bit address space. The
Base Address Two register in PCI configura-
tion space contains the base address of the
internal RAM. This register is similar to the
ROM Base Address register in PCI configura-
tion space. To simplify loading of SCRIPTS
instructions, the base address of the RAM