
Index-2
SYM53C876/876E Data Manual
Index
C
C_BE/ (3-0)
,
2-3
,
3-6
Cache Line Size Enable bit
,
4-51
,
A-7
Cache Line Size Register
,
2-5
cache mode, see PCI cache mode
,
2-7
CCF2 – 0
,
2-20
Chained Block Move SCRIPTS Instruction
,
2-26
chained block moves
,
2-25
–
2-27
SODL register
,
2-26
SWIDE register
,
2-26
Wide SCSI Receive Bit
,
2-25
Wide SCSI Send Bit
,
2-25
Chained Mode bit
,
4-24
,
A-3
Chip Revision Level bits
,
4-40
,
A-6
Chip Test Five register
,
4-43
,
A-6
Chip Test Four register
,
4-42
,
A-6
Chip Test One register
,
4-39
,
A-6
Chip Test Six register
,
4-44
,
A-6
Chip Test Two register
,
4-39
,
A-6
Chip Test Zero register
,
4-38
,
A-5
Chip Type bits
,
4-59
,
A-8
CHMOV
,
2-25
Clear DMA FIFO
,
2-24
Clear DMA FIFO bit
,
4-40
,
A-6
Clear SCSI FIFO bit
,
4-66
,
A-10
CLF
,
2-24
CLK
,
3-5
Clock
,
3-5
Clock Address Incrementor bit
,
4-43
,
A-6
Clock Byte Counter bit
,
4-43
,
A-6
Clock Conversion Factor
,
2-20
Clock Conversion Factor bits
,
4-26
,
A-3
CLSE
,
2-5
CMP
,
2-23
Configuration Read Command
,
2-4
Configuration Registers
,
4-1
Base Address One (Memory)
,
4-8
Base Address Two (Memory)
,
4-9
Base Address Zero (I/O)
,
4-8
BIST
,
4-7
Cache Line Size
,
4-6
Capabilities Pointer
,
4-11
Capability ID
,
4-13
Class Code
,
4-5
Command
,
4-3
Data
,
4-16
Device ID
,
4-2
Expansion ROM Base Address
,
4-10
Header Type
,
4-7
Interrupt Line
,
4-11
Interrupt Pin
,
4-12
Latency Timer
,
4-6
Max_Lat
,
4-13
Min_Gnt
,
4-12
Next Item Pointer
,
4-14
Power Management Capabilities
,
4-14
Power Management Control/Status
,
4-14
,
4-15
Revision ID
,
4-5
Status
,
4-4
Subsystem ID
,
4-10
Subsystem Vendor ID
,
4-9
Vendor ID
,
4-2
Configuration Space
,
2-3
Configuration space
,
2-2
Configuration Write Command
,
2-5
Configured as I/O bit
,
4-39
,
A-6
Configured as Memory bit
,
4-39
,
A-6
Connected bit
,
4-22
,
4-37
,
A-3
,
A-5
Conventions
,
1-6
CSF
,
2-24
CTEST0 register
,
4-38
,
A-5
CTEST1 register
,
4-39
,
A-6
CTEST2 register
,
4-39
,
A-6
CTEST4 register
,
4-42
,
A-6
CTEST5 register
,
4-43
,
A-6
CTEST6 register
,
4-44
,
A-6
Cycle Frame
,
3-7
D
Data Acknowledge Status bit
,
4-40
,
A-6
data path
,
2-14
Data Paths
,
2-14
Data Request Status bit
,
4-40
,
A-6
Data Structure Address register
,
4-36
,
A-5
Data Transfer Direction bit
,
4-39
,
A-6
Data-In
,
2-26