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xxiv
SYM53C876/876E D
ATA
M
ANUAL
List of Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 6-4: Input Current as a Function of Input Voltage ............................ 6-11
Figure 6-5: Output Current as a Function of Output Voltage .......................6-11
Figure 6-6: Clock Timing ...........................................................................6-12
Figure 6-7: Reset Input .............................................................................. 6-13
Figure 6-8: Interrupt Output ...................................................................... 6-14
Figure 6-9: Configuration Register Read .....................................................6-16
Figure 6-10: Configuration Register Write .................................................. 6-17
Figure 6-11: Target Read, not from external memory ..................................6-18
Figure 6-12: Target Write, not from external memory ................................. 6-19
Figure 6-13: Target Read, from external memory ........................................ 6-21
Figure 6-14: Target Write, from external memory ....................................... 6-23
Figure 6-15: Op Code Fetch, non-Burst ...................................................... 6-25
Figure 6-16: Op Code Fetch, Burst .............................................................6-27
Figure 6-17: Back to Back Read .................................................................. 6-29
Figure 6-18: Back to Back Write ................................................................. 6-31
Figure 6-19: Burst Read ............................................................................. 6-33
Figure 6-20: Burst Write ............................................................................ 6-35
Figure 6-21: Read Cycle, Normal/Fast Memory ......................................... 6-37
Figure 6-22: Write Cycle, Normal/Fast Memory ........................................ 6-39
Figure 6-23: Read Cycle, Normal/Fast Memory ......................................... 6-40
Figure 6-24: Write Cycle, Normal/Fast Memory ........................................ 6-42
Figure 6-25: Read Cycle, Slow Memory .....................................................6-45
Figure 6-26: Write Cycle, Slow Memory .................................................... 6-47
Figure 6-27: Read Cycle, 16 KB ROM ....................................................... 6-49
Figure 6-28: Write Cycle, 16 KB ROM ....................................................... 6-51
Figure 6-29: Initiator Asynchronous Send ................................................... 6-53
Figure 6-30: Initiator Asynchronous Receive ............................................... 6-54
Figure 6-31: Target Asynchronous Send .....................................................6-54
Figure 6-32: Target Asynchronous Receive ................................................. 6-55
Figure 6-33: Initiator and Target Synchronous Transfers ............................. 6-55
Figure B-1: SYM53C876 208-Pin PQFP Mechanical Drawing...................... B-2
Figure B-2: SYM53C876 256-Bump PBGA Mechanical Drawing .................B-3