
PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
85
9 Flash, GPIO, EEPROM, and I
2C Programming
9.1 Flash Memory Access
The SiI3124 supports an external Flash memory device of up to 4 Mbits (512 Kbytes) in capacity. Access to the Flash
memory is available using either PCI Direct Access or Register Access.
9.1.1
PCI Direct Access
Access to the Expansion Rom is enabled by setting bit 0 in the Expansion Rom Base Address register at Offset 30h of the PCI
Configuration Space. When this bit is set, bits [31:19] of the same register are programmable by the system to set the base
address for all Flash memory accesses. Read and write operations with the Flash memory are initiated by Memory Read and
Memory Write commands on the PCI bus. Accesses may be as Bytes, Words, or DWords.
9.1.2
Register Access
This type of Flash memory access is carried out through a sequence of internal register read and write operations. The proper
programming sequences are detailed below.
9.1.2.1
Flash Write Operation
Verify that Flash Address register bit 25 (Mem Access Start) is zero. The bit is one when a memory access is in progress.
It is zero when the memory access is complete and ready for another operation.
Program the write address for the Flash memory access. The address field is bits [18:0] in the Flash Address register.
Program the write data for the Flash memory access. The data field is bits [7:0] in the Flash Memory Data register.
Program Flash Address register bit 24 (Mem Access Type) to zero for a memory write.
Initiate the Flash memory access by setting bit 25 in the Flash Address register.
9.1.2.2
Flash Read Operation
Verify that Flash Address register bit 25 (Mem Access Start) is zero. The bit is one when a memory access is in progress.
It is zero when the memory access is complete and ready for another operation.
Program the read address for the Flash memory access. The address field is bits [18:0] in the Flash Address register.
Program Flash Address register bit 24 (Mem Access Type) to one for a memory read.
Initiate the Flash memory access by setting bit 25 in the Flash Address register.
Verify that Flash Address register bit 25 (Mem Access Start) is clear. The bit is one when a memory access is in progress.
It is zero when the memory access is complete.
Read the data from bits [7:0] in the Flash Memory Data register.