
PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
11
2.2 SATA Interface Timing Specifications
Limits
Symbol
Parameter
Condition
Min
Typ
Max
Unit
TTX_RISE_FALL
Rise and Fall time at
transmitter
20%-80% at Gen 1
20%-80% at Gen 2
100
67
273
136
ps
TTX_TOL_FREQ
Tx Frequecny Long Term
Stability
-350
+350
ppm
TTX_AC_FREQ
Tx Spread-Sprectrum
Modulation Deviation
CLKI = SSC AC
modulation, subject to the
"Downspread SSC"
triangular modulation (30-
33KHz) profile per 6.6.4.5
in SATA 1.0 specification
-5000
+0
ppm
TTX_SKEW
Tx Differential Skew
15
ps
Table 2-4 SATA Interface Timing Specifications
2.3 SATA Interface Transmitter Output Jitter Characteristics
Limits
Symbol
Parameter
Condition
Min
Typ
Max
Unit
TJ5UI_15G
Total Jitter, Data-Data 5UI
Measured at Tx output pins
peak to peak phase variation
Random data pattern
65
ps
DJ5UI_15G
Deterministic Jitter, Data-
Data 5UI
Measured at Tx output pins
peak to peak phase variation
Random data pattern
30
ps
TJ250UI_15G
Total Jitter, Data-Data
250UI
Measured at Tx output pins
peak to peak phase variation
Random data pattern
85
ps
DJ250UI_15G
Deterministic Jitter, Data-
Data 250UI
Measured at Tx output pins
peak to peak phase variation
Random data pattern
40
ps
Table 2-5 SATA Interface Transmitter Output Jitter Characteristics, 1.5 Gb/s
Limits
Symbol
Parameter
Condition
Min
Typ
Max
Unit
TJfBAND/10_3G
Total Jitter, fC3dB=fBAUD/10
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
70
ps
DJfBAND/10_3G
Deterministic Jitter,
fC3dB=fBAUD/10
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
30
ps
TJfBAND/500_3G
Total Jitter, fC3dB=fBAUD/500
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
85
ps
DJfBAND/500_3G
Deterministic Jitter,
fC3dB=fBAUD/500
Measured at SATA Compliance
Point
Random data pattern
Load = LL Laboratory Load
45
ps
Table 2-6 SATA Interface Transmitter Output Jitter Characteristics, 3 Gb/s