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參數(shù)資料
| 型號(hào)： | SII3124ACBHU |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA364 |
| 封裝： | 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364 |
| 文件頁數(shù)： | 29/88頁 |
| 文件大?。?/td> | 592K |
| 代理商： | SII3124ACBHU |
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PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
35
5.3.8
PACKET Command PRB Structure
Table 5-7 shows the layout for PACKET commands. The Control and protocol override fields must be populated as described
above. The PACKET PRB FIS area is structured the same as a standard ATA command. The FIS area contains the PACKET
ATA command. After the initial PACKET command is transmitted, the device will respond with a “PIO Setup” FIS, requesting a
12 or 16-byte ATAPI command. The host driver must populate the area normally used for the first SGE with the desired
ATAPI command. The length of the ATAPI command is determined by the value of the packet length bit (Port Control, bit 5).
If packet length is 0, 12 bytes will be transmitted. If packet length is one, 16 bytes will be transmitted. The packet length field
must be initialized with the packet length value returned by the device in the IDENTIFY PACKET command. Table 5-7 shows
a representative 12-byte ATAPI command layout.
31
0
Protocol Override
Control
0x00
Received Transfer Count
0x04
Features / Error
Command / Status
C
R
PMP
FIS Type
0x08
Dev/Head
Cyl High
Cyl Low
Sector Number
0x0C
Features (Exp)
Cyl High (Exp)
Cyl Low (Exp)
Sector Num (Exp)
0x10
Device Control
Reserved
Sector Count (Exp)
Sector Count
0x14
Reserved
0x18
Reserved – Must Be Zero
0x1C
LBA
LBA (MSB)
Reserved
ATAPI opcode
0x20
XFR Length (MSB)
Reserved
LBA (LSB)
LBA
0x24
Reserved
XFR Length (LSB)
0x28
Reserved
0x2C
SGE1 Data Address Low
0x30
SGE1 Data Address High
0x34
SGE1Data Count
0x38
SGE1 TRM
SGE1 LNK
SGE1 DRD
SGE1 XCF
Reserved[27:0]
0x3C
*Highlighted ATAPI packet is an example typical of some commands; other command packets
will have different formats within the highlighted bytes.
Table 5-7 Port Request Block For PACKET Command
The SiI3124 does not decode the ATAPI command to determine the necessity or direction of any associated data transfer.
The host driver must supply this information by setting control_packet_read (control field, bit4) or control_packet_write (control
field, bit 5) for any PACKET command that requires data transfer. Failure to set one of these bits for an ATAPI command that
requests data transfer will result in an Overrun or Underrun Command Error condition.
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