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參數(shù)資料
| 型號： | SII3124ACBHU |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA364 |
| 封裝： | 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364 |
| 文件頁數(shù)： | 61/88頁 |
| 文件大?。?/td> | 592K |
| 代理商： | SII3124ACBHU |
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PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
64
7.2.7
BIST Status Register
Address Offset: 58H
Access Type: Read
Reset Value: 0x8000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
BISTgood
Reserved
BISTerrcnt
Bit [31]
: BISTgood (R) – This bit indicates that all comparisons have been good since initiating data loopback
BIST. This bit is initialized (to 1) when the BISTenable bit is zero in the BIST Control register.
Bit [30:12]
: Reserved (R). This bit field is reserved and returns zeros on a read.
Bit [11:00]
: BISTerrcnt (R). This bit field indicates the number of comparisons that have been in error since
initiation of data loopback BIST. This counter is a saturating counter (it stops counting at 0FFFH). This counter
is cleared when the BISTenable bit is zero in the BIST Control register.
7.2.8
Flash Address
Address Offset: 70H
Access Type: Read/Write
Reset Value: 0xXXXX_XXXX
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
GPIO
En
able
Reserved
‘0001’
Me
m
P
res
e
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t
M
e
m
A
cce
ss
St
art
M
e
m
A
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ss
T
y
pe
Reserved
Memory Address
This register is the address and command/status register for the Flash memory interface. The register bits are defined below.
Bit [31]
: GPIO Enable (R/W). This bit, when set to one, enables the use of the Flash Data pins for General Purpose
I/O.
Bit [30:27]
: Reserved (R). This bit field is reserved and returns ‘0001’ on a read.
Bit [26]
: Mem Present (R) – Memory Present. This bit set indicates that the auto-initialization signature was
read correctly from the Flash Memory.
Bit [25]
: Mem Access Start (R/W) – Memory Access Start. This bit is set to initiate an operation to Flash
memory. This bit is self-clearing when the operation is complete.
Bit [24]
: Mem Access Type (R/W) – Memory Access Type. This bit is set to define a read operation from Flash
memory. This bit is cleared to define a write operation to Flash memory.
Bit [23:19]
: Reserved (R). This bit field is reserved and returns zeros on a read.
Bit [18:00]
: Memory Address (R/W). This bit field is programmed with the address for a Flash memory read or
write access.
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| SII3531 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:SteelVine⑩ Host Controller |
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