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參數(shù)資料
| 型號： | SII3124ACBHU |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA364 |
| 封裝： | 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364 |
| 文件頁數(shù)： | 62/88頁 |
| 文件大?。?/td> | 592K |
| 代理商： | SII3124ACBHU |
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PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
65
7.2.9
Flash Memory Data / GPIO Control
Address Offset: 74H
Access Type: Read/Write
Reset Value: 0x00XX_XXXX
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Reserved
GPIO Control
Transition Detect
Memory Data
This register contains the GPIO data/control fields and the Flash memory data register.
Bit [31:24]
: Reserved (R). This bit field is reserved and returns zeros on a read.
Bit [23:16]
: GPIO Control (R/W). The bits of this field are written to control the output type for corresponding
Flash data lines; if a bit is a 1 the corresponding output is an open drain output (only driven low); if a 0 the
corresponding output is always driven. To use a GPIO pin as an input, the control bit must be set to 1 (open-
drain output) and the data bit must be set to 1 (undriven).
Bit [15:08]
: Transition Detect (R/C). The bits of this field report signal transition detection on the corresponding
FLASH data input; reading the register resets the transition detect bits.
Bit [07:00]
: Memory Data (R/W) – Flash Memory Data. This bit field is used for Flash write data on a write
operation, and returns the Flash read data on a read operation. For GPIO, this field is used to write the GPIO
output register and to read the GPIO input signals.
7.2.10 I
2C Address
Address Offset: 78H
Access Type: Read/Write
Reset Value: 0xXXXX_XXXX
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Control Byte
I
2C Address (Addr Byte Cnt = ‘11’)
Unused
I
2C Address (Addr Byte Cnt = ‘10’)
Control Code
Chip
Select
I
2 C
Ac
c
e
s
Ty
p
e
Unused
I
2C Address (Addr Byte Cnt = ‘01’)
This register holds the Address Bytes and Control Byte for the I
2C interface. The register bits are defined below.
Bit [31:24]
: Control Byte (R/W). This bit field contains the Control Code, Chip Select and Access Type for an
I
2C access. Access Type set to ‘1’ defines a read operation.
Bit [23:00]
: I
2C Address (R/W). This bit field contains the address for an I2C access. The number of address
bytes used is determined by the setting of the Address Byte Count field in the I
2C Data register.
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| SII3531 | 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:SteelVine⑩ Host Controller |
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