
20
EPSON
S1C63808 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
MOD16
EVCNT
FCSEL
PLPOL
0
16 bits
Event ct.
With NR
8 bits
Timer
No NR
16-bit mode selection
Timer 0 counter mode selection
Timer 0 function selection (for event counter mode)
Timer 0 pulse polarity selection (for event counter mode)
R/W
FFC0H
MOD16 EVCNT FCSEL
PLPOL
PTPS01
PTPS00
PTRST03
PTRUN0
0
– 2
0
Reset
Run
Invalid
Stop
Prescaler 0
division ratio
selection
Timer 0 reset (reload)
Timer 0 Run/Stop
WR/W
R/W
FFC2H
PTPS01 PTPS00 PTRST0 PTRUN0
0
1/1
1
1/4
2
1/32
3
1/256
[PTPS01, 00]
Division ratio
CHSEL0
PTOUT
CKSEL1
CKSEL0
0
Timer 1
On
OSC3
Timer 0
Off
OSC1
TOUT output selection
TOUT output control
Prescaler 1 source clock selection
Prescaler 0 source clock selection
R/W
FFC1H
CHSEL0 PTOUT CKSEL1 CKSEL0
PTPS11
PTPS10
PTRST13
PTRUN1
0
– 2
0
Reset
Run
Invalid
Stop
Prescaler 1
division ratio
selection
Timer 1 reset (reload)
Timer 1 Run/Stop
WR/W
R/W
FFC3H
PTPS11 PTPS10 PTRST1 PTRUN1
0
1/1
1
1/4
2
1/32
3
1/256
[PTPS11, 10]
Division ratio
RLD03
RLD02
RLD01
RLD00
0
MSB
Programmable timer 0 reload data (low-order 4 bits)
LSB
R/W
FFC4H
RLD17
RLD16
RLD15
RLD14
0
MSB
Programmable timer 1 reload data (high-order 4 bits)
LSB
R/W
FFC7H
RLD17
RLD16
RLD15
RLD14
PTD03
PTD02
PTD01
PTD00
0
MSB
Programmable timer 0 data (low-order 4 bits)
LSB
R
FFC8H
PTD03
PTD02
PTD01
PTD00
PTD07
PTD06
PTD05
PTD04
0
MSB
Programmable timer 0 data (high-order 4 bits)
LSB
R
FFC9H
PTD07
PTD06
PTD05
PTD04
PTD13
PTD12
PTD11
PTD10
0
MSB
Programmable timer 1 data (low-order 4 bits)
LSB
R
FFCAH
PTD13
PTD12
PTD11
PTD10
PTD17
PTD16
PTD15
PTD14
0
MSB
Programmable timer 1 data (high-order 4 bits)
LSB
R
FFCBH
PTD17
PTD16
PTD15
PTD14
RLD13
RLD12
RLD11
RLD10
0
MSB
Programmable timer 1 reload data (low-order 4 bits)
LSB
R/W
FFC6H
RLD13
RLD12
RLD11
RLD10
RLD07
RLD06
RLD05
RLD04
0
MSB
Programmable timer 0 reload data (high-order 4 bits)
LSB
R/W
FFC5H
RLD07
RLD06
RLD05
RLD04
RLD03
RLD02
RLD01
RLD00
FFE0H
0EISER2 EISTR2 EISRC2
RR/W
0 3
EISER2
EISTR2
EISRC2
– 2
0
Enable
Mask
Unused
Interrupt mask register (Serial I/F 2 error)
Interrupt mask register (Serial I/F 2 transmit completion)
Interrupt mask register (Serial I/F 2 receive completion)
FFE1H
0EISER1 EISTR1 EISRC1
RR/W
0 3
EISER1
EISTR1
EISRC1
– 2
0
Enable
Mask
Unused
Interrupt mask register (Serial I/F 1 error)
Interrupt mask register (Serial I/F 1 transmit completion)
Interrupt mask register (Serial I/F 1 receive completion)
FF86H
NF
VF
ZF
CALMD
RR/W
NF
VF
ZF
CALMD
0
Negative
Overflow
Zero
Run
Div.
Positive
No
Stop
Mult.
Negative flag
Overflow flag
Zero flag
Operation status (reading)
Calculation mode selection (writing)
Table 4.1.1 (f) I/O memory map (FF86H–FFE1H)