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參數(shù)資料
| 型號(hào)： | S1C63158D0A010P |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53 |
| 封裝： | DIE-53 |
| 文件頁(yè)數(shù)： | 133/159頁(yè) |
| 文件大小： | 1200K |
| 代理商： | S1C63158D0A010P |
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S1C63808 TECHNICAL MANUAL
EPSON
67
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmable Timer)
CKSEL0: Prescaler 0 source clock selection register (FFC1HD0)
CKSEL1: Prescaler 1 source clock selection register (FFC1HD1)
Selects the source clock of the prescaler.
When "1" is written: OSC3 clock
When "0" is written: OSC1 clock
Reading: Valid
The source clock for the prescaler is selected from OSC1 or OSC3. When "0" is written to the CKSELx
register, the OSC1 clock is selected as the input clock for the prescaler x (for timer x) and when "1" is
written, the OSC3 clock is selected.
When the event counter mode is selected for timer 0, the setting of CKSEL0 becomes invalid.
When timers 0 and 1 are used as a 16-bit timer, the setting of CKSEL1 becomes invalid.
At initial reset, these registers are set to "0".
PTPS00, PTPS01: Timer 0 prescaler division ratio selection register (FFC2HD2, D3)
PTPS10, PTPS11: Timer 1 prescaler division ratio selection register (FFC3HD2, D3)
Sets the division ratio of the prescaler as shown in Table 4.9.9.2.
Table 4.9.9.2 Selection of prescaler division ratio
PTPSx1
1
0
PTPSx0
1
0
1
0
Prescaler division ratio
Source clock / 256
Source clock / 32
Source clock / 4
Source clock / 1
When the event counter mode is selected to timer 0, the setting of PTPS00 and PTPS01 becomes invalid.
When timers 0 and 1 are used as a 16-bit timer, the setting of PTPS10 and PTPS11 becomes invalid.
At initial reset, these registers are set to "0".
MOD16: 16-bit mode selection register (FFC0HD3)
Selects whether timers 0 and 1 are used as a 16-bit timer or 2 channels of 8-bit timer.
When "1" is written: 16-bit timer
When "0" is written: 8-bit timer
Reading: Valid
When "1" is written to MOD16, a 16-bit timer is configured with timer 0 for low-order byte and timer 1 for
high-order byte. Use the timer 0 registers for control. When "0" is written to MOD16, timer 0 and timer 1
are used as independent 8-bit timers.
At initial reset, this register is set to "0".
EVCNT: Timer 0 counter mode selection register (FFC0HD2)
Selects a counter mode for timer 0.
When "1" is written: Event counter mode
When "0" is written: Timer mode
Reading: Valid
The counter mode for timer 0 is selected from either the event counter mode or timer mode. When "1" is
written to the EVCNT register, the event counter mode is selected and when "0" is written, the timer
mode is selected.
At initial reset, this register is set to "0".
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