參數(shù)資料
型號(hào): S1C63158D0A010P
元件分類: 微控制器/微處理器
英文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53
封裝: DIE-53
文件頁數(shù): 152/159頁
文件大?。?/td> 1200K
代理商: S1C63158D0A010P
84
EPSON
S1C63808 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
Data transmit procedure
The control procedure and operation during transmitting is as follows.
Data transmitting
End
TXENx
← 0
No
Yes
Transmit complete ?
Set transmitting data
to TRXDx0–TRXDx7
No
Yes
ISTRx = 1 ?
TXENx
← 0
TXTRGx
← 1
TXENx
← 1
Fig. 4.10.7.2 Transmit procedure in asynchronous mode
(1) Write "0" in the transmit enable register TXENx to reset the serial interface.
(2) Write "1" in the transmit enable register TXENx to set into the transmitting enable status.
(3) Write the transmitting data into TRXDx0–TRXDx7.
Also, when 7-bit data is selected, the TRXDx7 data becomes invalid.
(4) Write "1" in the transmit control bit TXTRGx and start transmitting.
This control causes the shift clock to change to enable and a start bit (low) is output to the SOUTx
terminal in synchronize to its falling edge. The transmitting data set to the shift register is shifted
one bit at a time at each falling edge of the clock thereafter and is output from the SOUTx terminal.
After the data output, it outputs a stop bit (high) and high level is maintained until the next start
bit is output.
The transmitting complete interrupt factor flag ISTRx is set to "1" at the point where the data
transmitting is completed. When interrupt has been enabled, a transmitting complete interrupt is
generated at this point.
Set the following transmitting data using this interrupt.
(5) Repeat steps (3) to (4) for the number of bytes of transmitting data, and then set the transmit
disable status by writing "0" to the transmit enable register TXENx, when the transmitting is
completed.
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