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EPSON
S1C63808 TECHNICAL MANUAL
APPENDIX PERIPHERAL CIRCUIT BOARDS FOR S1C63808
(3) Functional precautions
<SVD circuit>
- The SVD function is realized by artificially varying the power supply voltage using the VSVD
control on S5U1C63000P1.
- There is a finite delay time from when the power to the SVD circuit turns on until actual detection of
the voltage. On S5U1C63000P1, this delay is set to approx. 500 sec, which differs from that of the
actual IC. Refer to Chapter 7, "Electrical Characteristics", when setting the appropriate wait time for
the actual IC.
<Oscillation circuit>
- A wait time is required before oscillation stabilizes after the OSC3 oscillation control circuit (OSCC)
is turned on. On S5U1C63000P1, even when OSC3 oscillation is changed (CLKCHG) without a wait
time, OSC3 will function normally. Refer to Chapter 7, "Electrical Characteristics", when setting the
appropriate wait time for the actual IC.
- Use separate instructions to switch the clock from OSC3 to OSC1 and to turn off the OSC3 oscillation
circuit. If executed simultaneously with a single instruction, these operations, although good with
S5U1C63000P1, may not function properly well with the actual IC.
- Because the logic level of the oscillation circuit is high, the timing at which the oscillation starts on
S5U1C63000P1 differs from that of the actual IC.
- S5U1C63000P1 contains oscillation circuits for OSC1 and OSC3. Keep in mind that even though the
actual IC may not have a resonator connected to its OSC3, its emulator can operate with the OSC3
circuit.
- S5U1C63000P1 generates the OSC3 clock using the onboard CR oscillation circuit even if ceramic
oscillation is selected for the OSC3 oscillation circuit by mask option.
<Power supply for EPD driver IC>
The characteristics of the power supply for the EPD driver IC, such as voltage values (VC1–VC3)
output from the I/O connector and drive capability are different from those of the actual IC. Further-
more, note that the output voltage may oscillate if an element such as a capacitor is connected to the
output terminal.
The voltage values can be adjusted manually using the VC5 control.
<Access to undefined address space>
If any undefined space in the S1C63808's internal ROM/RAM or I/O is accessed for data read or write
operations, the read/written value is indeterminate. Additionally, it is important to remain aware that
indeterminate state differs between S5U1C63000P1 and the actual IC. Note that the ICE
(S5U1C63000H1/S5U1C63000H2) incorporates the program break function caused by accessing to an
undefined address space.
<Reset circuit>
Keep in mind that the operation sequence from when the ICE and the peripheral circuit board are
powered on until the time at which the program starts running differs from the sequence from when
the actual IC is powered on till the program starts running. This is because S5U1C63000P1 becomes
capable of operating as a debugging system after the user program and optional data are down-
loaded. When operating the ICE after placing it in free-running mode, always apply a system reset. A
system reset can be performed by pressing the reset switch on S5U1C63000P1, by a reset pin input, or
by holding the input ports high simultaneously.