
S1C63808 TECHNICAL MANUAL
EPSON
121
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)
Table 4.15.4.1(b) Control bits of interrupt
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
FFF6H
FFF8H
IRUN
ILAP
ISW1
ISW10
R/W
IRUN
ILAP
ISW1
ISW10
0
(R)
Yes
(W)
Reset
(R)
No
(W)
Invalid
Interrupt factor flag (Stopwatch direct RUN)
Interrupt factor flag (Stopwatch direct LAP)
Interrupt factor flag (Stopwatch timer 1 Hz)
Interrupt factor flag (Stopwatch timer 10 Hz)
IT3
IT2
IT1
IT0
R/W
IT3
IT2
IT1
IT0
0
(R)
Yes
(W)
Reset
(R)
No
(W)
Invalid
Interrupt factor flag (Clock timer 1 Hz)
Interrupt factor flag (Clock timer 2 Hz)
Interrupt factor flag (Clock timer 8 Hz)
Interrupt factor flag (Clock timer 32 Hz)
FFF4H
000
IK0
RR/W
0 3
IK0
– 2
0
(R)
Yes
(W)
Reset
(R)
No
(W)
Invalid
Unused
Interrupt factor flag (K00–K03)
FFF5H
000
IK1
RR/W
0 3
IK1
– 2
0
(R)
Yes
(W)
Reset
(R)
No
(W)
Invalid
Unused
Interrupt factor flag (K10–K13)
*1 Initial value at initial reset
*2 Not set in the circuit
*3 Constantly "0" when being read
EIPT1, EIPT0: Interrupt mask registers (FFE2HD2, D1, D0)
IPT1, IPT0: Interrupt factor flags (FFF2HD2, D1, D0)
Refer to Section 4.9, "Programmable Timer".
EISER1, EISTR1, EISRC1: Interrupt mask registers (FFE1HD2, D1, D0)
EISER2, EISTR2, EISRC2: Interrupt mask registers (FFE0HD2, D1, D0)
ISER1, ISTR1, ISRC1: Interrupt factor flags (FFF1HD2, D1, D0)
ISER2, ISTR2, ISRC2: Interrupt factor flags (FFF0HD2, D1, D0)
Refer to Section 4.10, "Serial Interface".
KCP03–KCP00, KCP13–KCP10: Input comparison registers (FF22H, FF26H)
SIK03–SIK00, SIK13–SIK10: Interrupt selection registers (FF20H, FF24H)
EIK0, EIK1: Interrupt mask registers (FFE4HD0, FFE5HD0)
IK0, IK1: Interrupt factor flags (FFF4HD0, FFF5HD0)
Refer to Section 4.4, "Input Ports".
EIT3–EIT0: Interrupt mask registers (FFE6H)
IT3–IT0: Interrupt factor flags (FFF6H)
Refer to Section 4.7, "Clock Timer".
EIRUN, EILAP, EISW1, EISW10: Interrupt mask registers (FFE8H)
IRUN, ILAP, ISW1, ISW10: Interrupt factor flags (FFF8H)
Refer to Section 4.8, "Stopwatch Timer".
4.15.5 Programming notes
(1) The interrupt factor flags are set when the interrupt condition is established, even if the interrupt
mask registers are set to "0".
(2) After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag =
"1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure
to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the
interrupt enabled state.
(3) After an initial reset, all the interrupts including NMI are masked until both the stack pointers SP1
and SP2 are set with the software. Be sure to set the SP1 and SP2 in the initialize routine. Further,
when re-setting the stack pointer, the SP1 and SP2 must be set as a pair. When one of them is set, all
the interrupts including NMI are masked and interrupts cannot be accepted until the other one is set.