參數(shù)資料
型號(hào): S1C63158D0A010P
元件分類: 微控制器/微處理器
英文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53
封裝: DIE-53
文件頁數(shù): 145/159頁
文件大?。?/td> 1200K
代理商: S1C63158D0A010P
78
EPSON
S1C63808 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
(3) Setting of transfer mode
Select the clock synchronous mode by writing the data as indicated below to the two bits of the
mode selection registers SMDx0 and SMDx1.
Master mode: SMDx0 = "0", SMDx1 = "0"
Slave mode:
SMDx0 = "1", SMDx1 = "0"
(4) Clock source selection
In the master mode, select the synchronous clock source by writing data to the two bits of the
clock source selection registers SCSx0 and SCSx1. (See Table 4.10.4.1.)
This selection is not necessary in the slave mode.
The parity enable register EPRx is also assigned to this address, however, since parity is not
necessary in the clock synchronous mode, parity check will not take place regardless of how they
are set.
(5) Clock source control
When the master mode is selected and programmable timer for the clock source is selected, set
transfer rate on the programmable timer side. (See "4.9 Programmable Timer".)
When the divided signal of OSC3 oscillation circuit is selected for the clock source, be sure that the
OSC3 oscillation circuit is turned ON prior to commencing data transfer. (See "4.3 Oscillation
Circuit".)
Note that the frequency of the serial interface clock is limited to a maximum of 2 MHz.
(6) Serial data input/output permutation
The S1C63808 provides the data input/output permutation select register SDPx to select whether
the serial data bits are transferred from the LSB or MSB. The SDPx register should be set before
writing data to TRXDx0–TRXDx7.
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