參數(shù)資料
型號： PSD4256G6V-10UIT
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 1M X 8 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝： PLASTIC, TQFP-80
文件頁數(shù)： 69/127頁
文件大小： 1091K
代理商： PSD4256G6V-10UIT
Specific features
PSD4256G6V
10
Specific features
10.1
Flash Memory Sector Protect
Each sector of primary or secondary Flash memory can be separately protected against
Program and Erase cycles. Sector Protection provides additional data security because it
disables all Program or Erase cycles. This mode can be activated (or deactivated) through
the JTAG-ISP port or a device programmer.
Sector protection can be selected for each sector using the PSDsoft program. This
automatically protects selected sectors when the device is programmed through the JTAG
port or a device programmer. Flash memory sectors can be unprotected to allow updating of
their contents using the JTAG port or a device programmer. The MCU can read (but cannot
change) the sector protection bits.
Any attempt to program or erase a protected Flash memory sector is ignored by the device.
The Verify operation results in a READ of the protected data. This allows a guarantee of the
retention of the Protection status.
The sector protection status can be read by the MCU through the Flash memory protection
and secondary Flash memory protection registers (in the CSIOP block) or use the READ
Sector Protection instruction. See Table 18 to Table 20.
10.2
RESET instruction
The RESET instruction consists of one WRITE cycle (see Table 29 and Table 30). It can
also be optionally preceded by the standard two WRITE decoding cycles (writing AAh to
AAAh, and 55h to 554h).
The RESET instruction must be executed after:
●
Reading the Flash Protection Status or Flash ID
●
An Error condition has occurred (and the device has set the Error Flag bit (DQ5/DQ13)
to '1') during a Flash memory Program or Erase cycle.
The RESET instruction immediately puts the Flash memory back into normal Read mode.
However, if there is an error condition (with the Error Flag bit (DQ5/DQ13) set to '1') the
Flash memory will return to the Read mode in 25 s after the RESET instruction is issued.
The RESET instruction is ignored when it is issued during a Program or Bulk Erase cycle of
the Flash memory. The RESET instruction aborts any on-going Sector Erase cycle, and
returns the Flash memory to the normal Read mode in 25 s.
10.3
Reset (RESET) pin
A pulse on the Reset (RESET) pin aborts any cycle that is in progress, and resets the Flash
memory to the Read mode. When the reset occurs during a Program or Erase cycle, the
Flash memory takes up to 25 s to return to the Read mode. It is recommended that the
Reset (RESET) pulse (except for Power On Reset, as described in Section 21.1: Power-on
RESET) be at least 25 s so that the Flash memory is always ready for the MCU to retrieve
the bootstrap instructions after the RESET cycle is complete.
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