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參數資料
| 型號： | PSD4256G6V-10UIT |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1M X 8 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80 |
| 封裝： | PLASTIC, TQFP-80 |
| 文件頁數： | 56/127頁 |
| 文件大?。?/td> | 1091K |
| 代理商： | PSD4256G6V-10UIT |
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Detailed operation
PSD4256G6V
Unlock Bypass
Program(13)
1
A0h@
XXXXh
PD@ PA
Unlock Bypass
Reset(14)
1
90h@
XXXXh
00h@
XXXXh
1.
All bus cycles are WRITE bus cycles, except the ones with the “Read” label.
2.
All values are in hexadecimal:
X = “Don’t care.” Addresses of the form XXXXh, in this table, must be even addresses
RA = Address of the memory location to be read
RD = Data read from location RA during the READ cycle
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of WRITE Strobe (WR,
CNTL0).
PA is an even address for PSD in word programming mode.
PD = Data word to be programmed at location PA. Data is latched on the rising edge of WRITE Strobe (WR, CNTL0)
SA = Address of the sector to be erased or verified. The Sector Select (FS0-FS15 or CSBOOT0-CSBOOT3) of the sector
to be erased, or verified, must be Active (High).
3.
Sector Select (FS0 to FS15 or CSBOOT0 to CSBOOT3) signals are active High, and are defined in PSDsoft.
4.
Only address bits A11-A0 are used in instruction decoding.
5.
All WRITE bus cycles in an instruction are byte-WRITE to an even address (XAAAh or X554h). A Flash memory program
bus cycle writes a word to an even address.
6.
No Unlock or instruction cycles are required when the device is in the Read mode.
7.
The RESET instruction is required to return to the Read mode after reading the Flash ID, or after reading the Sector
Protection Status, or if the Error Flag bit (DQ5/DQ13) goes High.
8.
The MCU cannot invoke these instructions while executing code from the same Flash memory as that for which the
instruction is intended. The MCU must retrieve, for example, the code from the secondary Flash memory when reading the
Sector Protection Status of the primary Flash memory.
9.
The data is 00h for an unprotected sector, and 01h for a protected sector. In the fourth cycle, the Sector Select is active,
and (A1,A0) = (1,0).
10. Additional sectors to be erased must be written at the end of the Sector Erase instruction within 80s.
11. The system may perform read and program cycles in non-erasing sectors, read the Flash ID or read the Sector Protection
Status when in the Suspend Sector Erase mode. The Suspend Sector Erase instruction is valid only during a Sector Erase
cycle.
12. The Resume Sector Erase instruction is valid only during the Suspend Sector Erase mode.
13. The Unlock Bypass instruction is required prior to the Unlock Bypass Program instruction.
14. The Unlock Bypass Reset Flash instruction is required to return to reading memory data when the device is in the Unlock
Bypass mode.
Table 29.
16-bit instructions(1)(2)(3)(4)
Instruction(5)
FS0-FS15 or
CSBOOT0-
CSBOOT3
Cycle 1
Cycle 2
Cycle 3
Cycle 4
Cycle 5
Cycle 6
Cycle 7
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