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參數(shù)資料
型號： MC92604ZT
廠商： Freescale Semiconductor
文件頁數(shù)： 60/122頁
文件大?。?/td> 0K
描述： IC TXRX ETH DUAL GIG 196-MAPBGA
標(biāo)準(zhǔn)包裝： 630
類型： 收發(fā)器
驅(qū)動器/接收器數(shù)： 2/2
規(guī)程： 千兆位以太網(wǎng)
電源電壓： 4.5 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 196-LBGA
供應(yīng)商設(shè)備封裝： 196-MAPBGA（15x15）
包裝： 托盤
Receiver
MC92604 Dual Gigabit Ethernet Transceiver Reference Manual, Rev. 1
3-8
Freescale Semiconductor
In the reduced interface operational modes, the receiver signals RECV_x_7 through RECV_x_4 are not
used and the 5th and 9th data bits are output on the RECV_x_DV signal. With the reduced interface, data
in the alignment FIFO is presented at the receiver interface as double data rate (DDR), on the rising and
falling edge of the appropriate receiver clock, RECV_x_RCLK.
The receiver status and error reporting is coded onto the RECV_x_ERR, RECV_x_DV,
RECV_x_COMMA, and RECV_x_K signals.
All of the digital outputs of the device are internally “source terminated” and therefore do not require
external device resistors on the pcb. This applies to all received data, status, and clock outputs on the
MC92604.
3.5
Data Alignment Configurations
The receiver supports two modes of byte alignment as defined by the BSYNC signal. Table 3-4 shows the
settings to activate each mode.
NOTE
Do not use non-aligned mode (BSYNC = low) in 8-bit modes. The
non-aligned mode is only valid if TBIE is high.
3.5.1
Non-Aligned Mode (BSYNC = Low)
In non-aligned mode no attempt is made to align the incoming data stream. The bits are simply
accumulated into 10-bit code groups and forwarded. This mode should be used only with backplane 10-
or 5-bit data mode (TBIE = high, COMPAT = low), and with word synchronization disabled
(WSYNC1 = low and WSYNC0 = low).
3.5.2
Byte-Aligned Mode (BSYNC = High)
The remaining 4 receiver operating modes, shown in Table 3-3 align the incoming serial data into 10-bit
code groups. At power up, the receiver starts an alignment procedure, searching for the 8-bit pattern
defined by the 8B/10B COMMA codes. Synchronization logic checks for the distinct sequence,
‘00111110xx’ and ‘11000001xx’ (ordered bit 0–7), characteristic of the three valid COMMA code group
patterns. The search is done on the 10-bit data in the receiver, and is, therefore, independent of the state of
TBIE or COMPAT. Alignment requires a minimum of four, error-free, received COMMA code groups to
ensure proper alignment and lock. Non-COMMA code groups may be interspersed with the COMMA
code groups. The disparity of the COMMA code groups is not important to alignment and can be positive,
negative, or any combination. The receiver begins to forward received code groups once locked on an
alignment.
Table 3-4. Byte Synchronization Modes
Byte Alignment Mode
BSYNC
Byte Aligned
High
Non-Aligned
Low
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