- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4060 > MC68F375BGMZP33 (Freescale Semiconductor)IC MPU 32BIT 33MHZ 217-PBGA PDF資料下載
參數(shù)資料
| 型號： | MC68F375BGMZP33 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 593/616頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT 33MHZ 217-PBGA |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | M683xx |
| 處理器類型： | M683xx 32-位 |
| 速度： | 33MHz |
| 電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 217-BBGA |
| 供應(yīng)商設(shè)備封裝： | 217-PBGA（23x23） |
| 包裝： | 托盤 |
MC68F375
CENTRAL PROCESSOR UNIT
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
3-24
flow of a program under development. Changing the RPC to an odd value will cause
an address error when normal mode prefetching begins.
3.10.7.3 Current Instruction Program Counter (PCC)
The PCC holds a pointer to the first word of the last instruction executed prior to tran-
sition into background mode. Due to instruction pipelining, the instruction pointed to
may not be the instruction which caused the transition. An example is a breakpoint on
a released write. The bus cycle may overlap as many as two subsequent instructions
before stalling the instruction sequencer. A breakpoint asserted during this cycle will
not be acknowledged until the end of the instruction executing at completion of the bus
cycle. PCC will contain 0x00000001 if BDM is entered via a double bus fault immedi-
ately out of reset.
3.10.8 Returning from BDM
BDM is terminated when a resume execution (GO) or call user code (CALL) command
is received. Both GO and CALL flush the instruction pipeline and refetch instructions
from the location pointed to by the RPC.
The return PC and the memory space referred to by the status register SUPV bit reflect
any changes made during BDM. FREEZE is negated prior to initiating the first pre-
fetch. Upon negation of FREEZE, the serial subsystem is disabled, and the signals
revert to IPIPE/IFETCH functionality.
3.10.9 Serial Interface
Communication with the CPU32 during BDM occurs via a dedicated serial interface,
which shares pins with other development features. Figure 3-10 is a block diagram of
the interface. The BKPT signal becomes the serial clock (DSCLK); serial input data
(DSI) is received on IFETCH, and serial output data (DSO) is transmitted on IPIPE.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RSC50DTEF | CONN EDGECARD 100POS .100 EYELET |
| MPC8349EZUAGDB | IC MPU PWRQUICC II 672-TBGA |
| 15-38-8078 | CONN FFC FEMALE 7POS .100 TIN |
| 15-38-8070 | CONN FFC FEMALE 7POS .100 TIN |
| MPC8360EZUAGDGA | IC MPU POWERQUICC II PRO 740TBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68F375MZP33R2 | 功能描述:IC MPU 32BIT 33MHZ 217-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點(diǎn):- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤 |
| MC68H(R)C08JK1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68H(R)C08JK3 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68H(R)C08JL3 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68H705C8A | 制造商:Motorola Inc 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。