
MC68F375
CDR MoneT FLASH FOR THE IMB3 (CMFI)
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
10-26
WARNING
If the PROTECT bit is set then the CMFI EEPROM array will not be
programmed. Also, if PEEM = 0, no programming voltages will be
applied to the array and if B0EM = 0, no programming voltages will
be applied to block 0.
10.6.6.1 Program Sequence
The CMFI EEPROM module requires a sequence of writes to the high voltage control
registers (CMFICTL1 and CMFICTL2) and to the program page buffer(s) in order to
enable the high voltage to the array or shadow information for program operation. The
required program sequence follows.
1. Write PROTECT = 0 to disable protection on the CMFI EEPROM array.
2.
Write PAWS to 0b100, write NVR = 1, write GDB = 1.
timing control fields for a program pulse to the CMFICTL1 register. Write
BLOCK[7:0] to select the array blocks to be programmed and PE = 0 in the
CMFICTL2 register.
WARNING
Do not select the block bits of blocks not currently being programmed.
4. Write SES = 1 in the CMFICTL2 register. This step can be done with the same
write in step 2 but is split out as a separate step in the sequence for looping.
5. Programming writes. Write to the 64-byte array locations to be programmed.
This shall update the programming page buffer(s) with the information to be
programmed. Only the last write to each word within the program page buffer
shall be saved for programming. All accesses of the array after the first write
shall be to the same block offset address (IADDR[14|13:6]) regardless of the
address provided. Thus the locations accessed after the first programming
write are limited to the page locations to be programmed. Off page read access-
es of the CMFI array after the first programming write are program margin reads
All program page buffers share the same block offset address (IAD-
DR[14|13:6]) stored in the BIU. The block offset address is extracted from the
address of the first programming write. To select the CMFI EEPROM array
block(s) that will be programmed, the program page buffers use the CMFI EE-
PROM array configuration and BLOCK[7:0]. Subsequent writes fill in the pro-
gram page buffers using the block address to select the program page buffer
and the page word address (IADDR[5:2]) to select the word in the page buffer.
The array configuration and BLOCK[7:0] determine which blocks are pro-
grammed simultaneously.
6. Write EHV = 1 in the CMFICTL2 register. If a program buffer has not received
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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