- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45204 > MC16V1CPU20B1 (MOTOROLA INC) 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | MC16V1CPU20B1 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 59/128頁 |
| 文件大?。?/td> | 571K |
| 代理商： | MC16V1CPU20B1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁當(dāng)前第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁
MOTOROLA
MC68HC16V1
36
MC68HC16V1TS/D
Convert the result of the formula above into hexadecimal and place the MSW in the SWP register and
the LSW in the RTP register.
These calculations give the real-time period ranges shown in Table 17.
3.5 External Bus Interface
The external bus interface (EBI) transfers information between the internal MCU bus and external de-
vices. The external bus has 18 address lines and 16 data lines.
The EBI operates as a bus master and allows the CPU to access external memory resources. The EBI
runs external bus cycles based on the programming of the chip-select base address and option regis-
ters, and the chip select pin options programmed in the port D pin assignment register.
The EBI supports byte, word, and long-word transfers. Ports are accessed through the use of asynchro-
nous cycles controlled by the data size (SIZE) and data transfer acknowledge (DTACK) pins.
External bus operation is synchronous to the clock output (CLKOUT) signal. The external bus speed is
programmable from two to 16 clock cycles (0 to 14 wait states) with optional external bus termination
using the DTACK signal. The bus speed is programmed on a per chip-select basis in the DTACK field
of each chip-select option register (CSOR).
At least one chip-select must be programmed to provide external bus cycle termination unless bus cy-
cles are to be terminated by the use of the DTACK function. Chip-selects used to access external mem-
ories or peripherals can be programmed for 8- or 16-bit, multiplexed or non-multiplexed accesses on a
per chip-select basis. Operation of the boot chip-select, CSB, can be overridden by the state of the
ADDR/DATA[8:7] pins during reset. Refer to 3.6.2 Default Configuration Override During Reset for
more information.
3.5.1 Transfer Size
At the beginning of a bus cycle, the SIZE signal is driven along with the function code signals. The SIZE
signal is only relevant for 16-bit port accesses and indicates the number of bytes remaining to be trans-
ferred during an operand cycle (refer to Table 18). It is valid while the address strobe (AS) is asserted.
1. The resolution of each range within a system frequency category is the range’s lower bound. For example, in
the first row of the 32.768 kHz column, the resolution is 61.0
s.
Table 17 Timer Period Ranges (Downcounters Chained)
RTDC
Clock Source
Time-Out Ranges for Typical Values of fref and fsys
1
32.768 kHz
4.194 MHz
16.777 MHz
20.972 MHz
fsys/2 or fref/2
61.0
s to 72.8 hrs
477 ns to 34.1 mins
119 ns to 8.53 mins
95.4 ns to 6.83 mins
fpre/16
977
s to 48.5 days
7.63
s to 9.10 hrs
1.91
s to 8102 s
1.53
s to 1.82 hrs
fpre/64
3.91 ms to 194 days
30.5
s to 36.4 hrs
7.63
s to 9.10 hrs
6.10
s to 7.28 hrs
fpre/256
15.6 ms to 2.13 yrs
122
s to 6.07 days
30.5
s to 36.4 hrs
24.4
s to 29.1 hrs
fpre/1024
62.5 ms to 8.51 yrs
488
s to 24.3 days 122 s to 6.07 days
97.7
s to 4.85 days
Table 18 SIZE Signal Encoding
SIZE
Transfer Size
1
Byte
0
Word
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC2670L | DOT MAT LCD DRVR AND DSPL CTLR, CDIP28 |
| MC2670P | DOT MAT LCD DRVR AND DSPL CTLR, PDIP28 |
| MC2671AS | 1 CHANNEL(S), SERIAL COMM CONTROLLER, CDIP40 |
| MC2671AL | 1 CHANNEL(S), SERIAL COMM CONTROLLER, CDIP40 |
| MC2675B5S | SPECIALTY MICROPROCESSOR CIRCUIT, CDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC16XSD200FK | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Dual 16 mOhm High Side Switch |
| MC16Z1CFC25B1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC16Z1CPV20B1 | 制造商:Rochester Electronics LLC 功能描述:16 BIT MCU, 1K RAM - Bulk |
| MC16Z3BCAG16 | 功能描述:16位微控制器 - MCU 16BIT MCU 4KRAM 8KROM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MC-17 | 功能描述:TERM BARRIER 17CIRC DUAL ROW RoHS:是 類別:連接器，互連式 >> 接線座 - 隔板塊 系列:M 標(biāo)準(zhǔn)包裝:10 系列:Beau™ 38780 端接塊類型:阻隔塊 電路數(shù):15 導(dǎo)線入口數(shù)目:30 間距:0.438"（11.12mm） 行數(shù):2 電流:15A 電壓:300V 線規(guī):14-22 AWG 頂部端子:螺釘 底部端子:焊片 阻擋層類型:雙壁（雙） 特點:法蘭 顏色:黑 包裝:散裝 安裝類型:通孔 工作溫度:- 材料 - 絕緣體:聚對苯二甲酸丁二酯（PBT），玻璃纖維增強(qiáng)型 材料可燃性額定值:UL94 V-0 其它名稱:038780-111538780-1115387801115 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。