參數(shù)資料
型號(hào)： MC16V1CPU20B1
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100
封裝： TQFP-100
文件頁數(shù)： 19/128頁
文件大小： 571K
代理商： MC16V1CPU20B1
MC68HC16V1
MOTOROLA
MC68HC16V1TS/D
115
6.2 Address Map
Table 60 shows the GPT address map.
6.3 Capture/Compare Unit
The capture/compare unit features three input capture channels, four output compare channels, and
one input capture/output compare channel (function selected by control register). Refer to Figure 21.
These channels share a 16-bit free-running counter (TCNT), which derives its clock from seven stages
of a 9-stage prescaler. Refer to Figure 22.
This section also contains one pulse accumulator channel. The pulse accumulator logic includes its own
8-bit counter and can operate in either event counting mode or gated time accumulation mode. Refer
1. Y = M111, where M is the logic state of the module mapping (MM) bit in the SLIMCR.
Table 60 GPT Address Map
Address
15
8
7
0
$YFF9001
GPT MODULE CONFIGURATION REGISTER (GPTMCR)
$YFF902
GPT MODULE TEST REGISTER (GPTMTR)
$YFF904
INTERRUPT CONFIGURATION REGISTER (ICR)
$YFF906
PGP DATA DIRECTION (DDRGP)
PGP DATA (PORTGP)
$YFF908
OC1 ACTION MASK (OC1M)
OC1 ACTION DATA (OC1D)
$YFF90A
TIMER COUNTER (TCNT)
$YFF90C
PULSE ACCUMULATOR CONTROL
(PACTL)
PULSE ACCUMULATOR COUNTER
(PACNT)
$YFF90E
TIMER INPUT CAPTURE 1 (TIC1)
$YFF910
TIMER INPUT CAPTURE 2 (TIC2)
$YFF912
TIMER INPUT CAPTURE 3 (TIC3)
$YFF914
TIMER OUTPUT COMPARE 1 (TOC1)
$YFF916
TIMER OUTPUT CAPTURE 2 (TOC2)
$YFF918
TIMER OUTPUT CAPTURE 3 (TOC3)
$YFF91A
TIMER OUTPUT CAPTURE 4 (TOC4)
$YFF91C
TIMER INPUT CAPTURE 4/OUTPUT COMPARE 5 (TI4/O5)
$YFF91E
TIMER CONTROL 1 (TCTL1)
TIMER CONTROL 2 (TCTL2)
$YFF920
TIMER MASK 1 (TMSK1)
TIMER MASK 2 (TMSK2)
$YFF922
TIMER FLAG 1 (TFLG1)
TIMER FLAG 2 (TFLG2)
$YFF924
FORCE COMPARE (CFORC)
NOT USED
$YFF926
NOT USED
$YFF928
NOT USED
$YFF92A
NOT USED
$YFF92C
GPT PRESCALER (PRESCL)
$YFF92E–
$YFF93F
RESERVED
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