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參數(shù)資料
| 型號： | MC16V1CPU20B1 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 47/128頁 |
| 文件大?。?/td> | 571K |
| 代理商： | MC16V1CPU20B1 |
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MC68HC16V1
MOTOROLA
MC68HC16V1TS/D
25
W — Frequency Control Bit(s)
This field has different lengths and functions, depending on the clock mode. In slow reference mode, a
single W bit is used to multiply the reference frequency. In fast reference mode, three W bits are used
to multiply the reference frequency.
Y — Frequency Control Bit(s)
This field has different lengths and functions, depending on the clock mode. In slow reference mode,
six Y bits are used to multiply the reference frequency. In fast reference mode, three Y bits are used to
divide the PLL output frequency. In the external clock mode, three Y bits are used to divide the input
clock frequency.
EDIV — E Clock Divide Rate
0 = ECLK frequency is system clock divided by 8.
1 = ECLK frequency is system clock divided by 16.
ECLK is an external M6800 bus clock available on pin ADDR23 of some SLIM implementations. EDIV
also affects ECLK synchronized chip-select bus cycles. Refer to 3.9 Chip-Selects for more information.
The MC68HC16V1 does not have the ADDR23/ECLK pin, however, ECLK synchronized chip-selects
may still be used.
STOSC — Stop Oscillator
0 = The crystal oscillator circuit continues to operate while in LPSTOP.
1 = The crystal oscillator circuit and the PLL are turned off to save power during LPSTOP. All clocks
on the chip are stopped. In LPSTOP mode, all SLIM interrupt request lines become asynchro-
nous, and all system protection functions are disabled.
The STOSC bit has no effect on the system clock in external clock mode.
LOSCD — Loss of Clock Oscillator Disable
0 = Loss of clock oscillator reference is enabled.
1 = Loss of clock oscillator reference is disabled and not running.
SLIMP — Limp Mode
0 = System clock is being provided normally, either by the PLL or by an external clock from the
EXTAL input.
1 = Loss of system clock has been detected, and the system clock is being provided from the loss
of clock oscillator reference.
SLOCK — Synthesizer Lock Flag
0 = VCO is enabled, but has not yet locked into the narrow bandwidth mode.
1 = VCO is disabled (system clock is driven in directly), or the VCO is locked.
RSTEN — Reset Enable
0 = Loss of clock causes the MCU to operate in limp mode.
1 = Loss of clock causes reset.
STSLIM — Stop Mode SLIM Clock
0 = When LPSTOP is executed, the SLIM clock is driven from the crystal oscillator and the VCO is
turned off to conserve power.
1 = When LPSTOP is executed, the SLIM clock is driven from the VCO.
STEXT — Stop Mode External Clock
0 = When LPSTOP is executed, no external clock is driven.
1 = When LPSTOP is executed, the external clock is driven from the SLIM clock, as determined by
the state of the STSLIM bit.
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