參數(shù)資料
型號(hào)： AD9920ABBCZRL
廠商： Analog Devices Inc
文件頁數(shù)： 73/112頁
文件大?。?/td> 0K
描述： IC PROCESSOR CCD 12BIT 105CSPBGA
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 12
電壓 - 電源，模擬： 1.6 V ~ 2 V
電壓 - 電源，數(shù)字： 1.6 V ~ 2 V
封裝/外殼： 105-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 105-CSPBGA（8x8）
包裝： 帶卷 (TR)
AD9920A
Rev. B | Page 63 of 112
FIELD COUNTERS
The AD9920A contains three field counters (primary, secondary,
and mode). When these counters are active, they increment with
each VD cycle. The mode counter is the field counter used with
the mode register to control the vertical timing signals (see the
The primary and secondary counters are more flexible and are
generally used for shuttering signal applications. Both the primary
and secondary counters have several modes of operation that
are selected by Address 0x70. These modes are as follows:
Normal (single count)
RapidShot (repeating count)
ShotTimer (delayed count)
ShotTimer with RapidShot
Manual exposure
Manual readout
Force to idle
The primary counter regulates the expose and read actions
by regulating the SUBCK and VSG signals. In addition, if the
RapidShot feature is used with the primary counter, the SUBCK
and VSG masking automatically repeats as necessary for multiple
expose/read cycles. The secondary counter has no effect on the
SUBCK or VSG signal. Both counters can be used to regulate
the general-purpose signals described in the General-Purpose
Table 44. Primary/Secondary Field Counter Registers (Address 0x70, Address 0x71, and Address 0x72)
Register
Length (Bits)
Description
PRIMARY_ACTION
3
0 = idle, no counter action. GPO signals can still be controlled using polarity or by setting the
appropriate GP_PROTOCOL register to 1.
SECOND_ACTION
3
1 = activate counter. Single cycle of counter from 1 to counter maximum value and then return to
idle state.
2 = RapidShot. After reaching the maximum counter value, the counter wraps and repeats until reset.
3 = ShotTimer. Active single cycle of counter after added delay of n fields (use the corresponding
DELAY register).
4 = ShotTimer with RapidShot. Same as RapidShot (SECOND_ACTION register = 2) but with an added
delay of n fields between each repetition.
5 = manual exposure. Primary counter stays in exposure until manual readout or reset to idle.
This mode keeps the SUBCK and VSG pulses masked indefinitely.
6 = manual readout. Primary counter switches to readout (VSG pulses becomes active).
7 = force to idle.
PRIMARY_MAX
13
Primary counter maximum value.
SECOND_MAX
12
Secondary counter maximum value.
VDHD_MASK
3
Mask VD/HD during counter operation.
PRIMARY_DELAY
13
ShotTimer. Number of fields to delay before the next primary count (exposure) starts. If using
ShotTimer with RapidShot, the delay value is used between each repetition.
PRIMARY_SKIP
1
When using ShotTimer with RapidShot, use the primary delay value only before the first count (exposure).
SECOND_DELAY
13
ShotTimer. Number of fields to delay before the next secondary count starts. If using ShotTimer with
RapidShot, the delay value is used between each repetition.
SECOND_SKIP
1
When using ShotTimer with RapidShot, use the secondary delay value only before the first count.
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