參數(shù)資料
型號(hào)： AD9920ABBCZRL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 107/112頁(yè)
文件大小： 0K
描述： IC PROCESSOR CCD 12BIT 105CSPBGA
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 12
電壓 - 電源，模擬： 1.6 V ~ 2 V
電壓 - 電源，數(shù)字： 1.6 V ~ 2 V
封裝/外殼： 105-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 105-CSPBGA（8x8）
包裝： 帶卷 (TR)
AD9920A
Rev. B | Page 94 of 112
LAYOUT OF INTERNAL REGISTERS
The AD9920A address space is divided into two register areas, as
illustrated in Figure 115. In the first address space, Address 0x00 to
Address 0xFF contain the registers for the AFE, miscellaneous,
VD/HD, I/O and CP, timing core, shutter and GPO, and update
control functions. The second address space, beginning at
Address 0x400, consists of the V-pattern groups, V-sequences,
and field registers. This set of registers is configurable; the user
can decide how many V-pattern groups, V-sequences, and fields
are used in a particular design. Therefore, the addresses for
these registers vary, depending on the number of V-patterns
and V-sequences chosen.
Address 0x28 specifies the total number of V-pattern groups
and V-sequences used. The starting address for the V-pattern
groups is always 0x400. The starting address for the V-sequences
is based on the number of V-pattern groups used, with each
V-pattern group occupying 48 register addresses. The starting
address for the field registers depends on both the number of
V-pattern groups and the number of V-sequences.
Each V-sequence occupies 40 register addresses, and each field
occupies 16 register addresses.
The starting address for the V-sequences is equal to 0x400 plus
the number of V-pattern groups multiplied by 48. The starting
address for the fields is equal to the starting address of the
V-sequences plus the number of V-sequences multiplied by 40.
The V-pattern, V-sequence, and field registers must always
occupy a continuous block of addresses.
Figure 116 shows an example in which three V-pattern groups,
four V-sequences, and two fields are used. The starting address
for the V-pattern groups is always 0x400. Because VPATNUM = 3,
the V-pattern groups occupy 144 address locations. The start of
the V-sequence registers is 0x490 (that is, 0x400 + 144). With
SEQNUM = 4, the V-sequences occupy 160 address locations.
Therefore, the field registers begin at 0x530 (that is, 0x490 + 160).
The AD9920A address space contains many unused addresses.
Undefined addresses between Address 0x00 and Address 0xFF
should not be written to; otherwise, the AD9920A may operate
incorrectly. Continuous register writes should be performed
carefully so that undefined registers are not written to.
FIXED REGISTER AREA
ADDR 0x00
V-PATTERN GROUPS
V-SEQUENCES
CONFIGURABLE REGISTER AREA
VPAT START 0x400
FIELDS
MAX 0xFFF
VSEQ START
FIELD START
ADDR 0xFF
AFE REGISTERS
UPDATE CONTROL REGISTERS
MISCELLANEOUS REGISTERS
VD/HD REGISTERS
I/O, STBY POL REGISTERS
TIMING CORE REGISTERS
EXTRA REGISTERS
MEMORY, MODE REGISTERS
TEST REGISTERS
SHUTTER AND GPO REGISTERS
INVALID DO NOT ACCESS
0
68
78
-11
5
Figure 115. Layout of AD9920A Registers
ADDR 0x400
ADDR 0x490
ADDR 0x530
ADDR 0x550
MAX 0xFFF
3 V-PATTERN GROUPS
(48 × 3 = 144 REGISTERS)
4 V-SEQUENCES
(40 × 4 = 160 REGISTERS)
2 FIELDS
(16 × 2 = 32 REGISTERS)
UNUSED MEMORY
06
87
8-
11
6
Figure 116. Example Register Configuration
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