參數(shù)資料
型號: ZPSD813F1V
英文描述: Flash In System Programmable Mirocomputer Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲器,256K位EEPROM,16K位SRAM)
中文描述: Flash在系統(tǒng)可編程Mirocomputer外設(shè)(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬位閃速存儲器,256K位的EEPROM,16K的位的SRAM)
文件頁數(shù): 51/130頁
文件大?。?/td> 650K
代理商: ZPSD813F1V
Prelimnary
PSD813F Famly
47
The
PSD813F
Functional
Blocks
(cont.)
9.3 Microcontroller Bus Interface
The “no-glue logic” PSD813F Microcontroller Bus Interface can be directly connected to
most popular microcontrollers and their control signals. Key 8-bit microcontrollers with their
bus types and control signals are shown in Table 17. The interface type is specified using
the PSDsoft Configuration.
Data
Bus
Width
MCU
CNTL0
CNTL1
CNTL2
PC7
*
*
*
*
*
*
DBE
*
PD0**
ADIO0
PA3-PA0 PA7-PA3
*
A3-A0
*
*
*
*
*
D3-D0
8031
80C51XA
80C251
80C251
80198
68HC11
68HC912
Z80
NEURON
3150 CHIP
Z8
68330
M37702M2
8
8
8
8
8
8
8
8
WR
WR
WR
WR
WR
R/W
R/W
WR
RD
RD
PSEN
RD
RD
E
E
RD
PSEN
PSEN
*
PSEN
*
*
*
*
ALE
ALE
ALE
ALE
ALE
AS
AS
*
A0
A4
A0
A0
A0
A0
A0
A0
*
*
*
*
*
*
*
D7-D4
8
R/W
E
*
*
*
A0
D3-D0
D7-D4
8
8
8
R/W
R/W
R/W
DS
DS
E
*
*
*
*
*
*
AS
AS
ALE
A0
A0
A0
*
*
*
*
D3-D0
D7-D4
Table 17. Microcontrollers and their Control Signals
*
*
Unused CNTL2 pin can be configured as CPLD input. Other unused pins (PC7, PD0, PA3-0) can be
**
configured for other I/O functions.
**
ALE/AS input is optional for microcontrollers with a non-multiplexed bus
9.3.1. Interfacing 16-bit MCUs with Two PSD813F Devices.
The PSD813F has an internal 8-bit data bus. Users of 16-bit data bus MCUs can connect
two PSD813F devices in parallel such that one is tied to the upper data byte (D15-D8)
and the other is connected to the lower data byte (D7-D0). Refer to PSD813F Application
Notes on the configuration of two PSD813F to 16-bit MCUs.
9.3.2. PSD813F Interface to a Multiplexed 8-Bit Bus
Figure 18 shows an example of a system using a microcontroller with an 8-bit multiplexed
bus and a PSD813F. The ADIO port on the PSD813F is connected directly to the
microcontroller address/data bus. ALE latches the address lines internally. Latched
addresses can be brought out to Port A or B. The PSD813F drives the ADIO data bus only
when one of its internal resources is accessed and the RD input is active. Should the
system address bus exceed sixteen bits, Ports A, B, C, or D may be used as additional
address inputs.
9.3.3. PSD813F Interface to a Non-Multiplexed 8-Bit Bus
Figure 19 shows an example of a system using a microcontroller with an 8-bit
non-multiplexed bus and a PSD813F. The address bus is connected to the ADIO Port, and
the data bus is connected to Port A. Port A is in tri-state mode when the PSD813F is not
accessed by the microcontroller. Should the system address bus exceed sixteen bits, Ports
B, C, or D may be used for additional address inputs.
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